admin/LithosAnanake
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Artemis Milestone 2c: xHCI controller bring-up wired, DoE CSV export off by default

Browse Source 
xhci_bringup() (HC reset, DCBAA, Command/Event rings, RUN/STOP) was
uncommitted and referenced an XHCI_WAIT_FOR macro that was never defined,
breaking the build. Wired all four wait sites to the existing
xhci_wait_bit() helper instead, matching each register/bit/polarity
needed (halt-before-reset waits for HCH set; HCRST, CNR, and post-RUN
HCH waits all wait for their bit to clear).

Also flipped g_doe_log_enabled's default from 1 to 0 -- the per-tick
[HADES][DOE] CSV export was flooding every boot log and slowing
interactive verification for no reason during ordinary acceptance runs;
HB-ON still re-enables it at the REPL for anyone running an actual DoE
campaign.

Three-arch acceptance: amd64/aarch64/riscv64 all boot clean to ok>,
zero DoE rows in any log. aarch64 and riscv64 both exited cleanly via
BYE with no exception, confirming the earlier SMC->HVC PSCI fix still
holds. Logs and DoE CSV artifacts from this run included.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01HZ8kNoTuP63pbQtro4qvrm
This commit is contained in:
Robert Allan James
2026-08-22 08:33:35 -04:00
co-authored by Claude Sonnet 5
parent 5970c54912
commit c2f1d94c97
18 changed files with 41939 additions and 163471 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/starkernel/xhci.h
+7
View File
@@ -55,6 +55,13 @@ typedef struct {
#define XHCI_HCSPARAMS1_MAX_INTRS(v) (((uint32_t)(v) >> 8) & 0x7FFu)
#define XHCI_HCSPARAMS1_MAX_PORTS(v) (((uint32_t)(v) >> 24) & 0xFFu)
/* HCSPARAMS2: Max Scratchpad Buffers is a 10-bit field split across two
* non-adjacent locations (xHCI 1.2 spec table 5-13) — Hi bits[25:21],
* Lo bits[31:27]. Zero means the controller needs no scratchpad buffers
* (common for simple emulated controllers, but verify live, not assumed). */
#define XHCI_HCSPARAMS2_MAX_SCRATCHPAD_BUFS(v) \
((((uint32_t)(v) >> 21) & 0x1Fu) << 5 | (((uint32_t)(v) >> 27) & 0x1Fu))
/* -------------------------------------------------------------------------
* Operational Registers (BAR0 + cap_length)
* ------------------------------------------------------------------------- */
include/starkernel/xhci_driver.h
+27
View File
@@ -24,6 +24,16 @@ typedef struct {
uint32_t max_slots;
uint32_t max_ports;
uint32_t max_intrs;
uint32_t max_scratchpad_bufs;
/* Set up by xhci_bringup(); NULL/0 until then. */
void *dcbaa; /* Device Context Base Address Array */
void *scratchpad_arr; /* array of scratchpad buffer pointers, if any */
xhci_trb_t *cmd_ring; /* Command Ring, XHCI_RING_TRB_COUNT TRBs */
uint32_t cmd_ring_cycle; /* current Command Ring Cycle State (RCS) */
xhci_trb_t *evt_ring; /* Event Ring, XHCI_RING_TRB_COUNT TRBs */
void *evt_ring_seg_table; /* Event Ring Segment Table (1 entry) */
uint32_t evt_ring_cycle; /* current Event Ring Cycle State */
} xhci_dev_t;
/*
@@ -39,4 +49,21 @@ typedef struct {
*/
int xhci_find_and_map(xhci_dev_t *dev);
/*
* xhci_bringup — reset the controller, allocate and program the DCBAA,
* Command Ring, and Event Ring (Interrupter 0), then start
* the controller (RUN/STOP=1) and confirm it left the
* halted state.
*
* Must be called after a successful xhci_find_and_map(). Does not enable
* interrupts (USBCMD.INTE / IMAN.IE) — that's wired in a later increment
* alongside the actual interrupt handler.
*
* Returns 0 on success.
* Returns -1 on reset timeout.
* Returns -2 on allocation failure.
* Returns -3 if the controller failed to leave the halted state after RUN.
*/
int xhci_bringup(xhci_dev_t *dev);
#endif /* STARKERNEL_XHCI_DRIVER_H */