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ACL-TTL tick campaign checkpoint: 4/18 cells (zuse-authenticated, real

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enforcement)

Automated driver (scratchpad run_cell.sh) replicating Section R's
validated pilot procedure per cell: independent clean build, boot,
load doe.4th, load ACL.4th + ZUSE-AUTHENTICATE for enabled cells,
HB-OFF/HB-ON bracketed HEARTBEAT-TICKS@ before/after a seed/30-rep
EXEC-DOE run. Randomized 18-cell order (9 arch/seed pairs x 2 ACL
states), same discipline as Section P/Q.

4/18: amd64/13579/enabled, riscv64/12345/enabled,
riscv64/12345/disabled, amd64/12345/disabled -- all 480/480 rows, 0
errors.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
This commit is contained in:
Robert Allan James
2026-08-21 13:44:04 -04:00
co-authored by Claude Sonnet 5
parent 70c259dad0
commit d90f28b9da
8 changed files with 70102 additions and 1 deletions
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experiments/bare_metal/runs/acl-ttl-overhead-20260821-ticks/ticks.csv
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order,arch,seed,acl,before_tick,after_tick,delta_ticks,rows,errors
1,amd64,13579,enabled,80,261299,261219,480,0
2,riscv64,12345,enabled,80,261304,261224,480,0
3,riscv64,12345,disabled,79,261142,261063,480,0
4,amd64,12345,disabled,79,261142,261063,480,0
1 order arch seed acl before_tick after_tick delta_ticks rows errors
2 1 amd64 13579 enabled 80 261299 261219 480 0
3 2 riscv64 12345 enabled 80 261304 261224 480 0
4 3 riscv64 12345 disabled 79 261142 261063 480 0
5 4 amd64 12345 disabled 79 261142 261063 480 0