Robert Allan JamesandClaude Sonnet 5
ca52ce8243
New include/starkernel/rpi5_dtb.h / src/starkernel/arch/aarch64/rpi5_dtb.c:
rpi5_uart_base()/rpi5_mailbox_base(), each finding their peripheral by
compatible string ("arm,pl011" / "brcm,bcm2835-mbox") via fdt_find_node_by_
compatible() then reading its "reg" via fdt_find_prop_in_node().
Found and fixed a real translation gap before it could have silently
produced a wrong address: confirmed directly against bcm2712.dtsi
(raspberrypi/linux) that both peripherals live under one "soc"
simple-bus node whose ranges property adds a fixed 0x10_0000_0000
offset to every child reg value. fdt.c's reader deliberately doesn't
apply ranges translation generally (not a general devicetree
library); this file applies that one, fixed, SoC-wide offset
explicitly, documented with the exact devicetree excerpt that
confirmed it.
Compile-only verification -- no caller wired in yet, these two
functions are what the still-open entry-stub and mailbox-framebuffer-
driver punch-list items will call. Verified 3-arch boot to ok>
(amd64/aarch64/riscv64, each in the foreground; rpi5_dtb.o confirmed
built on aarch64, the only arch that compiles this file).
Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_019YcT3H2PQeyujrzjqS3Var
49 lines
1.8 KiB
C
49 lines
1.8 KiB
C
/*
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StarForth — Steady-State Virtual Machine Runtime
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Copyright (c) 2023–2025 Robert A. James. All rights reserved.
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Licensed under the StarForth License, Version 1.0.
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*/
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/**
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* rpi5_dtb.h - Raspberry Pi 5 (BCM2712) devicetree-based peripheral
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* discovery, for the native (non-UEFI) boot path (FABRIC-3.md §IV.3).
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*
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* Two lookups: the PL011 UART (early console) and the VideoCore mailbox
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* property interface (framebuffer setup, §IV.3 item 3). Both peripherals
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* live under BCM2712's own devicetree "soc" simple-bus node, which
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* applies one fixed address translation to every child `reg` value —
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* see `rpi5_dtb.c`'s own doc comment for the confirmed offset and where
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* it was verified. `fdt.c`'s reader deliberately does not do general
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* `ranges`-property translation (it is "not a general devicetree
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* library"); this file applies the one, fixed, SoC-wide offset by name
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* instead of teaching `fdt.c` a general mechanism for a single known
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* hardware fact.
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*/
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#ifndef STARKERNEL_RPI5_DTB_H
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#define STARKERNEL_RPI5_DTB_H
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#include <stdint.h>
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/**
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* @brief Find the PL011 UART's CPU-physical base address from the DTB.
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*
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* @param dtb Devicetree blob, as passed to the native boot entry (or
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* `BootInfo->dtb`); NULL is safe.
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* @return Final CPU-physical MMIO base address, or 0 if the node is
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* absent, malformed, or @p dtb is invalid.
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*/
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uint64_t rpi5_uart_base(const void* dtb);
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/**
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* @brief Find the VideoCore mailbox property interface's CPU-physical
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* base address from the DTB.
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*
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* @param dtb Devicetree blob; NULL is safe.
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* @return Final CPU-physical MMIO base address, or 0 if the node is
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* absent, malformed, or @p dtb is invalid.
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*/
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uint64_t rpi5_mailbox_base(const void* dtb);
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#endif /* STARKERNEL_RPI5_DTB_H */
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