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riscv64: explicit Bare-mode satp switch (item 4.3.5a)

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Punch list §25 item 4.3.5a complete.

Firmware (EDK2 RISC-V) leaves Sv57 paging active at kernel entry with an
identity mapping that has at least one confirmed hole (PLIC threshold
register). Verified live before acting: satp.MODE/PPN and __kernel_start's
address confirmed identity mapping; switched to Bare mode (csrw satp, x0 +
sfence.vma) in arch_early_init(), ahead of pmm_init()/vmm_init().
Three-arch acceptance boot clean, zero exceptions; riscv64's PLIC_THRESHOLD
write now survives (PLIC driver code itself lands separately with 4.3.5b).

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
This commit is contained in:
Robert Allan James
2026-08-08 11:07:29 -04:00
co-authored by Claude Sonnet 5
parent 06283e5364
commit 36965cf812
16 changed files with 73348 additions and 94 deletions
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capsules/BLOCK_MAP.md
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# Capsule Block Manifest — Auto-generated
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<!-- Hand-written justifications and immutability notes live -->
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