riscv64: virtio-keyboard-pci, interrupt-driven keyboard input (item 4.3.5c)
Punch list §25 item 4.3.5c complete. Amended from a nonexistent MMIO transport to PCI (matching the board's actual virtio-blk-pci precedent). New virtio-input driver: eventq with pre-posted buffers, PLIC source computed at runtime from PCI slot/pin (derived live from this host's QEMU riscv64 DTB), mandatory ISR-status read, PCI interrupt-disable-bit check. New VKBD-EVENT/VKBD-DEBUG FORTH words. Verified with a real QEMU sendkey keypress: exact KEY_A/press match, two real interrupts serviced, zero exceptions. Three-arch acceptance boot clean. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
This commit is contained in:
co-authored by
Claude Sonnet 5
parent
5f4df673c1
commit
8251aebcf8
@@ -4027,17 +4027,97 @@ document and committing that amendment as its own item.*
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> (`logs/20260808-112015/amd64/`), aarch64 (`logs/20260808-112108/aarch64/`), riscv64
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> (`logs/20260808-112235/riscv64/`, `PLIC: init` line present, no fault).
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- [ ] **4.3.5c — riscv64: virtio-keyboard-device, interrupt-driven.** Add
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`virtio-keyboard-device` (MMIO virtio, matching the existing MMIO virtio-blk pattern on
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this board) to the riscv64 `qemu`/`qemu-esp` targets in `Makefile.starkernel`. New driver
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under `src/starkernel/virtio/` for the virtio-input device class — decode `EV_KEY` events
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off the input event virtqueue. Unlike `virtio_blk.c`'s synchronous poll-the-used-ring
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pattern, this device must be interrupt-driven end to end: the used-ring notification
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arrives via the PLIC path from 4.3.5b, not a poll loop. Built on 4.3.5b.
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*Done when:* a keypress in QEMU on riscv64 produces a captured `EV_KEY` event via the
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interrupt path with no polling loop, three-arch QEMU boot unaffected, log committed.
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- [x] **4.3.5c — riscv64: virtio-keyboard-pci, interrupt-driven.** New driver under
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`src/starkernel/virtio/` for the virtio-input device class — decode `EV_KEY` events off
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the input event virtqueue. Unlike `virtio_blk.c`'s synchronous poll-the-used-ring pattern,
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this device must be interrupt-driven end to end: the used-ring notification arrives via
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the PLIC path from 4.3.5b, not a poll loop. Built on 4.3.5b.
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**Amended 2026-08-08 — transport was wrong.** Originally scoped as "MMIO virtio, matching
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the existing MMIO virtio-blk pattern on this board" — checked, not assumed, and that
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pattern doesn't exist: the Makefile's own riscv64 `qemu` target comment says
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"virtio-blk-pci GPT disk" and uses `-device virtio-blk-pci,...,addr=0x1`/`addr=0x2` — PCI
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transport, not MMIO. `virtio-mmio`/`VIRTIO_MMIO` appear nowhere in this tree. `pci.c`
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already supports riscv64 via ECAM with its own fallback base (`g_ecam_base =
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0x30000000ULL`). Corrected to PCI transport (`virtio-keyboard-pci`) — the same device
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class 4.3.5e uses on aarch64, which means this item and 4.3.5e now share most of the
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actual virtio-input driver logic (capability walk, feature negotiation, event-queue
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handling, ISR-status read), differing only in interrupt routing (PLIC vs. GIC).
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Concrete steps:
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1. Add `-device virtio-keyboard-pci,addr=0x3` to the riscv64 `qemu`/`qemu-esp` targets in
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`Makefile.starkernel` — explicit `addr=`, matching this target's existing precedent for
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the two `virtio-blk-pci` drives (`addr=0x1`/`addr=0x2`), so the PCI slot (and therefore
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the PLIC source, see below) is deterministic rather than left to QEMU's auto-assignment.
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2. New `include/starkernel/virtio_input.h` / `src/starkernel/virtio/virtio_input.c` —
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same device identity, event structure, and design questions as 4.3.5e's own plan
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(vendor `0x1AF4`, device ID `0x1052`, `struct virtio_input_event`, `EV_KEY = 0x01`, all
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from this build host's `/usr/include/linux/virtio_ids.h`/`virtio_input.h`/
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`input-event-codes.h`). **Resolved here, carries forward to 4.3.5e:** don't refactor
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`virtio_blk.c`'s `static walk_virtio_caps()` into shared code — duplicate a small
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version into `virtio_input.c` instead. Keeps this item's diff to new files only and
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leaves the working, tested `virtio_blk.c` untouched.
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3. Compute the target PLIC source at **runtime**: `pin = pci_read8(dev,
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PCI_CFG_INT_PIN)` (needs the same new `PCI_CFG_INT_PIN` = `0x3D` constant 4.3.5d adds
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to `pci.h` — add it here if 4.3.5d hasn't landed first), `slot = dev->device`, `source
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= 32 + ((slot + pin - 1) % 4)` → PLIC sources 32–35. Derived live from this host's
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QEMU 10.2.1 riscv64 `virt` DTB, not recalled — full decode in §27.5.2. `plic_set_priority()`/
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`plic_enable()` take this source directly (PLIC's interrupt specifier is one bare cell,
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no separate type/flags field the way GIC's SPI encoding needs).
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4. Same `pci_enable()` interrupt-disable-bit gap 4.3.5e flags (`pci.c:363` never clears PCI
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COMMAND bit 10) — check it here too, first, since this item lands before 4.3.5e.
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5. Same mandatory ISR-status read as 4.3.5e (`VIRTIO_PCI_CAP_ISR_CFG`, level-triggered per
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the decoded `interrupt-map` — see §27.5.2) — skipping it leaves the PLIC source's
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pending condition latched.
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6. Wire `riscv64_interrupt_handler()`'s `SCAUSE_S_EXTERNAL` branch (`interrupts.c`) to
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dispatch the computed PLIC source to the new driver's ISR, extending the generic
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claim/complete dispatch 4.3.5b built — same shape as i8042's branch in amd64's
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`isr_common_handler()`, per that dispatch function's own doc comment.
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*Done when:* a keypress in QEMU on riscv64 (via `sendkey`, same manual-injection technique
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as 4.3.5's amd64 verification) produces a captured `EV_KEY` event through the interrupt
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path with no polling loop anywhere in the path, three-arch QEMU boot unaffected, log
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committed.
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*Refs:* §27.5.
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> **Done, 2026-08-08.** New `include/starkernel/virtio_input.h` / `src/starkernel/virtio/
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> virtio_input.c`: capability walk duplicated from `virtio_blk.c` (per the resolved design
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> question above), status/feature negotiation mirroring `vblk_init_device()`, eventq
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> (queue 0) with `EVENTQ_SIZE`=8 pre-posted device-writable buffers re-posted after each
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> drain — no synchronous wait anywhere, unlike `vblk_io()`. `enable_interrupt_route()` is
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> arch-guarded (`#if defined(ARCH_RISCV64)` computes and enables the PLIC source per
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> §27.5.2's formula; the `#else` path reports rather than silently no-ops, so a future arch
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> using this file without adding its own routing fails loudly instead of a permanently-
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> pending, never-enabled source). `PCI_CFG_INT_PIN` (`0x3D`) and `PCI_CMD_INTX_DISABLE`
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> (bit 10) added to `pci.h` — the latter checked and cleared explicitly, since
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> `pci_enable()` never touches it. `virtio_input_isr()` reads `VIRTIO_PCI_CAP_ISR_CFG`
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> before draining (mandatory, not optional — the routed source is level-triggered).
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> `arch/riscv64/interrupts.c`'s `SCAUSE_S_EXTERNAL` branch now dispatches to it when the
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> PLIC claim matches `g_virtio_input_plic_source`, the first real per-source consumer of
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> 4.3.5b's substrate. `kernel_main.c` calls `virtio_input_find_keyboard()` unconditionally
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> right after the Artemis `virtio_blk_find_artemis()` call, same pattern.
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>
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> New FORTH words in `src/word_source/keyboard_words.c` (extending the same file 4.3.5's
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> `KBD-SCAN`/`KBD-DEBUG` already use, riscv64-branch added alongside the existing amd64
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> one, no-op elsewhere): `VKBD-EVENT ( -- code value -1 | 0 )` pops one decoded `EV_KEY`
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> event off the interrupt-fed ring; `VKBD-DEBUG ( -- isr_count )` is the standing
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> diagnostic. Distinct words from `KBD-SCAN`/`KBD-DEBUG` rather than shared ones — different
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> device, different event shape; convergence is 4.3.5f's explicit job, not this item's.
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>
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> Verified live with a real keypress, not synthetic: QEMU HMP `sendkey a` (temporary
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> monitor socket added to the Makefile for this test, reverted after — same treatment as
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> every other one-shot verification harness this session) while a second connection typed
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> `VKBD-EVENT . . . CR VKBD-DEBUG . CR` over the serial socket. Result: `-1 1 30` (flag,
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> value, code — `code=30` is `KEY_A` exactly, `value=1` is a press, per this build host's
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> `/usr/include/linux/input-event-codes.h`) then `2` (`VKBD-DEBUG`, confirming two real
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> interrupts serviced, not a poll artifact). Zero exceptions
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> (`logs/20260808-114907/riscv64/qemu-riscv64-20260808-114907-sendkey-verify.log`).
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>
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> Three-architecture acceptance boot clean (standard `make qemu`, no monitor socket, no
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> regression from the new dispatch/driver code): amd64 (`logs/20260808-114435/amd64/`),
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> aarch64 (`logs/20260808-114603/aarch64/`), riscv64 (`logs/20260808-114720/riscv64/`,
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> `virtio-input: found device` / `driver ready` present, no fault).
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- [ ] **4.3.5d — aarch64: GIC SPI wiring for virtio-input.** Item 0.6 scoped the GIC to
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"one interrupt" (the timer PPI) on purpose and explicitly called a general GIC driver
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out of scope. A PCI-attached `virtio-keyboard-pci` device signals via legacy INTx, which
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@@ -4118,11 +4198,11 @@ document and committing that amendment as its own item.*
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`/usr/include/linux/input-event-codes.h` (authoritative, not recalled): `struct
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virtio_input_event { __le16 type; __le16 code; __le32 value; }` (8 bytes), `EV_KEY =
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0x01`.
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4. **Design decision, flagged not resolved here:** `walk_virtio_caps()` (the
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capability-list walker `virtio_blk.c` uses for `COMMON_CFG`/`NOTIFY_CFG`) is `static`
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inside that file. This item needs the same walk plus, new, `ISR_CFG` (step 6). Promote
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it to a shared `virtio_pci.c`/`.h`, or duplicate it here? Get a ruling before writing
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code — don't default to one silently (§25.0 rule 3).
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4. **Resolved by 4.3.5c, 2026-08-08:** duplicate `walk_virtio_caps()` into
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`virtio_input.c` rather than promoting it out of `virtio_blk.c` into shared code —
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decided there since 4.3.5c lands first and needs the identical walk. This item's
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`virtio_input.c` is riscv64/4.3.5c's file plus the GIC-specific interrupt routing below;
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no separate capability-walker decision needed here.
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5. `pci_enable()` (`pci.c:363`) sets only IO/MEM/BUS_MASTER in the PCI COMMAND register —
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it never clears bit 10 (Interrupt Disable). If that bit is set at enumeration, INTx
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never asserts and every earlier step passes while producing zero real interrupts —
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@@ -4660,3 +4740,43 @@ intid = 32 + spi /* 35..38 */
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Not yet decoded/needed: entries for PCI bridge-forwarded interrupts or multi-function
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devices beyond function 0 — out of scope for a single virtio-keyboard-pci device on bus 0.
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### 27.5.2 riscv64 PLIC-source derivation for 4.3.5c (2026-08-08)
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Same method as §27.5.1, applied to the riscv64 `virt` board's own DTB rather than assumed
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to match aarch64's — dumped with `qemu-system-riscv64 -machine virt,dumpdtb=<file> -cpu
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rv64` (this tree's exact `qemu` target flags, `Makefile.starkernel:921-923`) and decoded the
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same way (hand-parsed FDT struct block, no `dtc`).
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**Transport correction that motivated this item's amendment.** The `soc/pci@30000000` node
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(`compatible = "pci-host-ecam-generic"`, `reg = 0x30000000 0x10000000`) confirms PCI/ECAM,
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matching `pci.c`'s existing riscv64 fallback base exactly — there is no MMIO virtio
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transport on this board, corrected at the 4.3.5c entry itself (§25.5).
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**PLIC's interrupt binding is one cell, not three.** `soc/plic@c000000`'s own
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`#address-cells = 0`, `#interrupt-cells = 1` (phandle `0x3`) — simpler than GIC's
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`<type num flags>` triple, so the `interrupt-map` entry stride here is 6 cells (3 child-addr
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+ 1 child-irq + 1 phandle + 1 parent-irq), not GIC's 10. `interrupt-map-mask` is the
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identical `0x1800 0 0 0x7` (slot mod 4) pattern §27.5.1 found on aarch64 — same GPEX-family
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host bridge behaviour, confirmed independently rather than assumed carried over. Decoded
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table (phandle `0x3` on every entry, confirming it targets the PLIC node just read):
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| slot mod 4 | INTA | INTB | INTC | INTD |
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|---|---|---|---|---|
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| 0 | PLIC 32 | PLIC 33 | PLIC 34 | PLIC 35 |
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| 1 | PLIC 33 | PLIC 34 | PLIC 35 | PLIC 32 |
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| 2 | PLIC 34 | PLIC 35 | PLIC 32 | PLIC 33 |
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| 3 | PLIC 35 | PLIC 32 | PLIC 33 | PLIC 34 |
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Closed form:
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```
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pin = pci_read8(dev, PCI_CFG_INT_PIN) /* config offset 0x3D; 1=INTA .. 4=INTD */
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slot = dev->device /* already populated by pci_find_first() */
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source = 32 + ((slot + pin - 1) % 4) /* 32..35 */
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```
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4.3.5c pins the new device to `addr=0x3` (slot 3) explicitly in the Makefile rather than
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relying on QEMU's auto-assignment — deterministic, and keeps this table's slot-3 row as the
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one that actually matters for that item, though the runtime formula above holds regardless
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of slot.
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@@ -926,6 +926,7 @@ else ifeq ($(ARCH),riscv64)
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-device virtio-blk-pci,drive=hd0,addr=0x2 \
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-drive id=artdisk,file=$(ARTDISK),format=raw,if=none \
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-device virtio-blk-pci,drive=artdisk,addr=0x1 \
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-device virtio-keyboard-pci,addr=0x3 \
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-device ramfb \
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-chardev socket,id=cserial,path=$$SERIAL_SOCK,server=on,wait=off,logfile=$$LOG \
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-serial chardev:cserial \
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@@ -1,5 +1,5 @@
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# Capsule Block Manifest — Auto-generated
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<!-- Generated by mkcapsule --manifest 2026-08-08T15:22:20Z -->
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<!-- Generated by mkcapsule --manifest 2026-08-08T15:47:05Z -->
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<!-- DO NOT EDIT — re-run mkcapsule --manifest to refresh. -->
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<!-- Hand-written justifications and immutability notes live -->
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<!-- in MANIFEST.md alongside this auto-generated index. -->
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23,230000,10000,0,0,176,10,38,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
24,240000,10000,0,0,175,10,25,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,11,23,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,14,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,16,30,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,17,23,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
29,290000,10000,0,0,164,17,27,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
30,300000,10000,0,0,154,18,26,685,685,0,0,0,65536,0,0,65536,0,0
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31,310000,10000,0,0,172,6,25,582,582,0,0,0,65536,0,0,65536,0,0
|
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32,320000,10000,0,0,180,9,22,567,567,0,0,0,65536,0,0,65536,0,0
|
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33,330000,10000,0,0,145,11,29,567,567,0,0,0,65536,0,0,65536,0,0
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34,340000,10000,0,0,203,14,30,582,582,0,0,0,65536,0,0,65536,0,0
|
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35,350000,10000,0,0,154,16,36,731,731,0,0,0,65536,0,0,65536,0,0
|
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36,360000,10000,0,0,144,18,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
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37,370000,10000,0,0,144,18,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
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38,380000,10000,0,0,132,18,28,4096,0,0,0,0,65536,0,0,65536,0,0
|
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39,390000,10000,0,0,180,18,24,4096,0,0,0,0,65536,0,0,65536,0,0
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40,400000,10000,0,0,220,23,20,4096,0,0,0,0,65536,0,0,65536,0,0
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41,410000,10000,0,0,215,25,19,4096,24,0,0,0,65536,0,0,65536,0,0
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42,420000,10000,0,0,208,32,20,4096,24,0,0,0,65536,0,0,65536,0,0
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43,430000,10000,0,0,177,36,19,4096,24,0,0,0,65536,0,0,65536,0,0
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44,440000,10000,0,0,199,42,20,4096,24,0,0,0,65536,0,0,65536,0,0
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45,450000,10000,0,0,223,47,19,4096,30,0,0,0,65536,0,0,65536,0,0
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46,460000,10000,0,0,202,50,17,4096,67,0,0,0,65536,0,0,65536,0,0
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47,470000,10000,0,0,218,57,18,4096,198,0,0,0,65536,0,0,65536,0,0
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48,480000,10000,0,0,221,60,20,4096,350,0,0,0,65536,0,0,65536,0,0
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49,490000,10000,0,0,225,66,20,4096,528,0,0,0,65536,0,0,65536,0,0
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50,500000,10000,0,0,214,69,21,4096,694,0,0,0,65536,0,0,65536,0,0
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51,510000,10000,0,0,227,71,23,4096,883,0,0,0,65536,0,0,65536,0,0
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52,520000,10000,0,0,208,71,23,4096,1043,0,0,0,65536,0,0,65536,0,0
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53,530000,10000,0,0,207,71,25,4096,1202,0,0,0,65536,0,0,65536,0,0
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54,540000,10000,0,0,200,71,26,4096,1319,0,0,0,65536,0,0,65536,0,0
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55,550000,10000,0,0,205,72,27,4096,1464,0,0,0,65536,0,0,65536,0,0
|
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56,560000,10000,0,0,211,73,27,4096,1620,0,0,0,65536,0,0,65536,0,0
|
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57,570000,10000,0,0,193,80,28,4096,1712,0,0,0,65536,0,0,65536,0,0
|
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58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
|
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1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,9,65536,0,0,65536,0,0
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1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,10,65536,0,0,65536,0,0
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2,20000,10000,0,0,78,10,7,4096,0,0,0,11,65536,0,0,65536,0,0
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3,30000,10000,0,0,101,13,7,4096,0,0,0,12,65536,0,0,65536,0,0
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3,30000,10000,0,0,101,13,7,4096,0,0,0,13,65536,0,0,65536,0,0
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4,40000,10000,0,0,63,19,8,4096,0,0,0,13,65536,0,0,65536,0,0
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5,50000,10000,0,0,92,25,8,4096,2,0,0,15,65536,0,0,65536,0,0
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6,60000,10000,0,0,64,27,8,4096,2,0,0,16,65536,0,0,65536,0,0
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5,50000,10000,0,0,92,25,8,4096,2,0,0,16,65536,0,0,65536,0,0
|
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6,60000,10000,0,0,64,27,8,4096,2,0,0,17,65536,0,0,65536,0,0
|
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7,70000,10000,0,0,228,32,8,4096,210,0,0,23,65536,0,0,65536,0,0
|
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8,80000,10000,0,0,256,34,9,4096,466,0,0,29,65536,0,0,65536,0,0
|
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9,90000,10000,0,0,256,36,10,4096,722,0,0,36,65536,0,0,65536,0,0
|
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9,90000,10000,0,0,256,36,10,4096,722,0,0,35,65536,0,0,65536,0,0
|
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10,100000,10000,0,0,256,36,11,4096,978,0,0,42,65536,0,0,65536,0,0
|
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11,110000,10000,0,0,256,36,11,4096,1234,0,0,48,65536,0,0,65536,0,0
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12,120000,10000,0,0,256,36,12,4096,1490,0,0,55,65536,0,0,65536,0,0
|
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13,130000,10000,0,0,256,37,12,4096,1746,0,0,61,65536,0,0,65536,0,0
|
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14,140000,10000,0,0,230,39,12,4096,1949,0,0,68,65536,0,0,65536,0,0
|
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15,150000,10000,0,0,256,39,13,4096,2204,0,0,74,65536,0,0,65536,0,0
|
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16,160000,10000,0,0,256,39,14,4096,2459,0,0,81,65536,0,0,65536,0,0
|
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17,170000,10000,0,0,256,39,15,4096,2713,0,0,87,65536,0,0,65536,0,0
|
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18,180000,10000,0,0,256,39,15,4096,2969,0,0,94,65536,0,0,65536,0,0
|
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19,190000,10000,0,0,256,39,16,4096,3224,0,0,100,65536,0,1,65536,0,0
|
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20,200000,10000,0,0,256,41,17,4096,3480,0,0,107,65536,0,1,65536,0,0
|
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21,210000,10000,0,0,256,41,17,4096,3736,0,0,115,65536,0,1,65536,0,0
|
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22,220000,10000,0,0,256,41,18,4096,3992,0,0,122,65536,0,1,65536,0,0
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23,230000,10000,0,0,256,41,19,4096,4096,0,0,128,65536,0,1,65536,0,0
|
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24,240000,10000,0,0,256,41,20,4096,4096,0,0,135,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,141,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,148,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,154,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,161,65536,0,1,65536,0,0
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29,290000,10000,0,0,256,45,24,512,512,0,0,168,65536,0,1,65536,0,0
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30,300000,10000,0,0,256,45,24,512,512,0,0,174,65536,0,1,65536,0,0
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31,310000,10000,0,0,256,45,25,256,256,0,0,181,65536,0,1,65536,0,0
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32,320000,10000,0,0,255,45,26,256,256,0,0,187,65536,0,1,65536,0,0
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33,330000,10000,0,0,256,45,27,256,256,0,0,193,65536,0,1,65536,0,0
|
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34,340000,10000,0,0,256,45,27,256,256,0,0,200,65536,0,1,65536,0,0
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35,350000,10000,0,0,256,45,28,256,256,0,0,206,65536,0,1,65536,0,0
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36,360000,10000,0,0,256,45,29,256,256,0,0,213,65536,0,1,65536,0,0
|
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12,120000,10000,0,0,256,36,12,4096,1490,0,0,54,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,256,37,12,4096,1746,0,0,60,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,230,39,12,4096,1949,0,0,66,65536,0,0,65536,0,0
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15,150000,10000,0,0,256,39,13,4096,2204,0,0,72,65536,0,0,65536,0,0
|
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16,160000,10000,0,0,256,39,14,4096,2459,0,0,78,65536,0,0,65536,0,0
|
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17,170000,10000,0,0,256,39,15,4096,2713,0,0,84,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,91,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,97,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,103,65536,0,1,65536,0,0
|
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21,210000,10000,0,0,256,41,17,4096,3736,0,0,111,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,117,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,124,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,130,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,136,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,142,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,149,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,155,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,161,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,167,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,174,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,180,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,186,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,192,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,198,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,205,65536,0,1,65536,0,0
|
||||
|
||||
|
@@ -17,79 +17,79 @@ tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_
|
||||
16,160000,10000,0,0,201,32,83,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,190,34,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,170,35,73,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,154,28,44,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
20,200000,10000,0,0,154,28,41,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
21,210000,10000,0,0,153,32,39,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
22,220000,10000,0,0,167,35,42,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
23,230000,10000,0,0,176,37,41,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
24,240000,10000,0,0,175,37,39,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,38,37,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,41,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,40,38,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,40,35,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
29,290000,10000,0,0,164,41,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
30,300000,10000,0,0,154,43,39,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
31,310000,10000,0,0,172,46,35,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
32,320000,10000,0,0,180,49,34,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
33,330000,10000,0,0,145,51,35,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
34,340000,10000,0,0,203,53,37,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
35,350000,10000,0,0,154,55,39,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
36,360000,10000,0,0,144,57,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
37,370000,10000,0,0,144,57,35,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
38,380000,10000,0,0,132,57,34,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
39,390000,10000,0,0,180,57,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
40,400000,10000,0,0,220,63,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
41,410000,10000,0,0,215,64,28,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
42,420000,10000,0,0,208,68,29,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
43,430000,10000,0,0,177,72,27,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
44,440000,10000,0,0,199,77,28,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
45,450000,10000,0,0,223,82,26,4096,30,0,0,0,65536,0,0,65536,0,0
|
||||
46,460000,10000,0,0,202,85,24,4096,67,0,0,0,65536,0,0,65536,0,0
|
||||
47,470000,10000,0,0,218,91,25,4096,198,0,0,0,65536,0,0,65536,0,0
|
||||
48,480000,10000,0,0,221,92,26,4096,350,0,0,0,65536,0,0,65536,0,0
|
||||
49,490000,10000,0,0,225,97,26,4096,528,0,0,0,65536,0,0,65536,0,0
|
||||
50,500000,10000,0,0,214,100,27,4096,694,0,0,0,65536,0,0,65536,0,0
|
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51,510000,10000,0,0,227,102,28,4096,883,0,0,0,65536,0,0,65536,0,0
|
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52,520000,10000,0,0,208,102,29,4096,1043,0,0,0,65536,0,0,65536,0,0
|
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53,530000,10000,0,0,207,102,30,4096,1202,0,0,0,65536,0,0,65536,0,0
|
||||
54,540000,10000,0,0,200,102,31,4096,1319,0,0,0,65536,0,0,65536,0,0
|
||||
55,550000,10000,0,0,205,103,32,4096,1464,0,0,0,65536,0,0,65536,0,0
|
||||
56,560000,10000,0,0,211,103,32,4096,1620,0,0,0,65536,0,0,65536,0,0
|
||||
57,570000,10000,0,0,193,110,33,4096,1712,0,0,0,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,154,35,40,731,731,0,0,0,65536,0,0,65536,0,0
|
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20,200000,10000,0,0,154,35,38,567,567,0,0,0,65536,0,0,65536,0,0
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21,210000,10000,0,0,153,38,37,4096,0,0,0,0,65536,0,0,65536,0,0
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22,220000,10000,0,0,167,38,38,582,582,0,0,0,65536,0,0,65536,0,0
|
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23,230000,10000,0,0,176,10,38,685,685,0,0,0,65536,0,0,65536,0,0
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24,240000,10000,0,0,175,10,25,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,11,23,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,14,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
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27,270000,10000,0,0,158,16,30,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,17,23,4096,0,0,0,0,65536,0,0,65536,0,0
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||||
29,290000,10000,0,0,164,17,27,4096,0,0,0,0,65536,0,0,65536,0,0
|
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30,300000,10000,0,0,154,18,26,685,685,0,0,0,65536,0,0,65536,0,0
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31,310000,10000,0,0,172,6,25,582,582,0,0,0,65536,0,0,65536,0,0
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32,320000,10000,0,0,180,9,22,567,567,0,0,0,65536,0,0,65536,0,0
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33,330000,10000,0,0,145,11,29,567,567,0,0,0,65536,0,0,65536,0,0
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34,340000,10000,0,0,203,14,30,582,582,0,0,0,65536,0,0,65536,0,0
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35,350000,10000,0,0,154,16,36,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
36,360000,10000,0,0,144,18,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
37,370000,10000,0,0,144,18,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
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38,380000,10000,0,0,132,18,28,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
39,390000,10000,0,0,180,18,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
40,400000,10000,0,0,220,23,20,4096,0,0,0,0,65536,0,0,65536,0,0
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41,410000,10000,0,0,215,25,19,4096,24,0,0,0,65536,0,0,65536,0,0
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42,420000,10000,0,0,208,32,20,4096,24,0,0,0,65536,0,0,65536,0,0
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43,430000,10000,0,0,177,36,19,4096,24,0,0,0,65536,0,0,65536,0,0
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44,440000,10000,0,0,199,42,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
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45,450000,10000,0,0,223,47,19,4096,30,0,0,0,65536,0,0,65536,0,0
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46,460000,10000,0,0,202,50,17,4096,67,0,0,0,65536,0,0,65536,0,0
|
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47,470000,10000,0,0,218,57,18,4096,198,0,0,0,65536,0,0,65536,0,0
|
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48,480000,10000,0,0,221,60,20,4096,350,0,0,0,65536,0,0,65536,0,0
|
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49,490000,10000,0,0,225,66,20,4096,528,0,0,0,65536,0,0,65536,0,0
|
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50,500000,10000,0,0,214,69,21,4096,694,0,0,0,65536,0,0,65536,0,0
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51,510000,10000,0,0,227,71,23,4096,883,0,0,0,65536,0,0,65536,0,0
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52,520000,10000,0,0,208,71,23,4096,1043,0,0,0,65536,0,0,65536,0,0
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53,530000,10000,0,0,207,71,25,4096,1202,0,0,0,65536,0,0,65536,0,0
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54,540000,10000,0,0,200,71,26,4096,1319,0,0,0,65536,0,0,65536,0,0
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55,550000,10000,0,0,205,72,27,4096,1464,0,0,0,65536,0,0,65536,0,0
|
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56,560000,10000,0,0,211,73,27,4096,1620,0,0,0,65536,0,0,65536,0,0
|
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57,570000,10000,0,0,193,80,28,4096,1712,0,0,0,65536,0,0,65536,0,0
|
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58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
|
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1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,9,65536,0,0,65536,0,0
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1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,8,65536,0,0,65536,0,0
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2,20000,10000,0,0,78,10,7,4096,0,0,0,10,65536,0,0,65536,0,0
|
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3,30000,10000,0,0,101,13,7,4096,0,0,0,12,65536,0,0,65536,0,0
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4,40000,10000,0,0,63,19,8,4096,0,0,0,13,65536,0,0,65536,0,0
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3,30000,10000,0,0,101,13,7,4096,0,0,0,11,65536,0,0,65536,0,0
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4,40000,10000,0,0,63,19,8,4096,0,0,0,12,65536,0,0,65536,0,0
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5,50000,10000,0,0,92,25,8,4096,2,0,0,15,65536,0,0,65536,0,0
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6,60000,10000,0,0,64,27,8,4096,2,0,0,16,65536,0,0,65536,0,0
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7,70000,10000,0,0,228,32,8,4096,210,0,0,23,65536,0,0,65536,0,0
|
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8,80000,10000,0,0,256,34,9,4096,466,0,0,29,65536,0,0,65536,0,0
|
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9,90000,10000,0,0,256,36,10,4096,722,0,0,35,65536,0,0,65536,0,0
|
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10,100000,10000,0,0,256,36,11,4096,978,0,0,41,65536,0,0,65536,0,0
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11,110000,10000,0,0,256,36,11,4096,1234,0,0,48,65536,0,0,65536,0,0
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12,120000,10000,0,0,256,36,12,4096,1490,0,0,54,65536,0,0,65536,0,0
|
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13,130000,10000,0,0,256,37,12,4096,1746,0,0,60,65536,0,0,65536,0,0
|
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14,140000,10000,0,0,230,39,12,4096,1949,0,0,66,65536,0,0,65536,0,0
|
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15,150000,10000,0,0,256,39,13,4096,2204,0,0,73,65536,0,0,65536,0,0
|
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16,160000,10000,0,0,256,39,14,4096,2459,0,0,79,65536,0,0,65536,0,0
|
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17,170000,10000,0,0,256,39,15,4096,2713,0,0,85,65536,0,0,65536,0,0
|
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18,180000,10000,0,0,256,39,15,4096,2969,0,0,91,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,98,65536,0,1,65536,0,0
|
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20,200000,10000,0,0,256,41,17,4096,3480,0,0,104,65536,0,1,65536,0,0
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21,210000,10000,0,0,256,41,17,4096,3736,0,0,110,65536,0,1,65536,0,0
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22,220000,10000,0,0,256,41,18,4096,3992,0,0,118,65536,0,1,65536,0,0
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23,230000,10000,0,0,256,41,19,4096,4096,0,0,125,65536,0,1,65536,0,0
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||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,131,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,137,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,143,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,150,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,156,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,162,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,168,65536,0,1,65536,0,0
|
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31,310000,10000,0,0,256,45,25,256,256,0,0,175,65536,0,1,65536,0,0
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32,320000,10000,0,0,255,45,26,256,256,0,0,181,65536,0,1,65536,0,0
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33,330000,10000,0,0,256,45,27,256,256,0,0,187,65536,0,1,65536,0,0
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34,340000,10000,0,0,256,45,27,256,256,0,0,193,65536,0,1,65536,0,0
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35,350000,10000,0,0,256,45,28,256,256,0,0,200,65536,0,1,65536,0,0
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36,360000,10000,0,0,256,45,29,256,256,0,0,206,65536,0,1,65536,0,0
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7,70000,10000,0,0,228,32,8,4096,210,0,0,22,65536,0,0,65536,0,0
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8,80000,10000,0,0,256,34,9,4096,466,0,0,28,65536,0,0,65536,0,0
|
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9,90000,10000,0,0,256,36,10,4096,722,0,0,34,65536,0,0,65536,0,0
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10,100000,10000,0,0,256,36,11,4096,978,0,0,40,65536,0,0,65536,0,0
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11,110000,10000,0,0,256,36,11,4096,1234,0,0,47,65536,0,0,65536,0,0
|
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12,120000,10000,0,0,256,36,12,4096,1490,0,0,53,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,256,37,12,4096,1746,0,0,59,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,230,39,12,4096,1949,0,0,65,65536,0,0,65536,0,0
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15,150000,10000,0,0,256,39,13,4096,2204,0,0,71,65536,0,0,65536,0,0
|
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16,160000,10000,0,0,256,39,14,4096,2459,0,0,77,65536,0,0,65536,0,0
|
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17,170000,10000,0,0,256,39,15,4096,2713,0,0,83,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,89,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,96,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,102,65536,0,1,65536,0,0
|
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21,210000,10000,0,0,256,41,17,4096,3736,0,0,108,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,116,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,122,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,128,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,135,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,141,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,147,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,153,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,160,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,166,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,172,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,178,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,185,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,191,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,197,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,203,65536,0,1,65536,0,0
|
||||
|
||||
|
@@ -17,79 +17,79 @@ tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_
|
||||
16,160000,10000,0,0,201,32,83,567,567,0,0,0,65536,0,0,65536,0,0
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17,170000,10000,0,0,190,34,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,170,35,73,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,154,28,44,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
20,200000,10000,0,0,154,28,41,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
21,210000,10000,0,0,153,32,39,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
22,220000,10000,0,0,167,35,42,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
23,230000,10000,0,0,176,37,41,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
24,240000,10000,0,0,175,37,39,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,38,37,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,41,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,40,38,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,40,35,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
29,290000,10000,0,0,164,41,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
30,300000,10000,0,0,154,43,39,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
31,310000,10000,0,0,172,46,35,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
32,320000,10000,0,0,180,49,34,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
33,330000,10000,0,0,145,51,35,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
34,340000,10000,0,0,203,53,37,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
35,350000,10000,0,0,154,55,39,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
36,360000,10000,0,0,144,57,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
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37,370000,10000,0,0,144,57,35,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
38,380000,10000,0,0,132,57,34,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
39,390000,10000,0,0,180,57,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
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40,400000,10000,0,0,220,63,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
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41,410000,10000,0,0,215,64,28,4096,24,0,0,0,65536,0,0,65536,0,0
|
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42,420000,10000,0,0,208,68,29,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
43,430000,10000,0,0,177,72,27,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
44,440000,10000,0,0,199,77,28,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
45,450000,10000,0,0,223,82,26,4096,30,0,0,0,65536,0,0,65536,0,0
|
||||
46,460000,10000,0,0,202,85,24,4096,67,0,0,0,65536,0,0,65536,0,0
|
||||
47,470000,10000,0,0,218,91,25,4096,198,0,0,0,65536,0,0,65536,0,0
|
||||
48,480000,10000,0,0,221,92,26,4096,350,0,0,0,65536,0,0,65536,0,0
|
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49,490000,10000,0,0,225,97,26,4096,528,0,0,0,65536,0,0,65536,0,0
|
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50,500000,10000,0,0,214,100,27,4096,694,0,0,0,65536,0,0,65536,0,0
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51,510000,10000,0,0,227,102,28,4096,883,0,0,0,65536,0,0,65536,0,0
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52,520000,10000,0,0,208,102,29,4096,1043,0,0,0,65536,0,0,65536,0,0
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53,530000,10000,0,0,207,102,30,4096,1202,0,0,0,65536,0,0,65536,0,0
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54,540000,10000,0,0,200,102,31,4096,1319,0,0,0,65536,0,0,65536,0,0
|
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55,550000,10000,0,0,205,103,32,4096,1464,0,0,0,65536,0,0,65536,0,0
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56,560000,10000,0,0,211,103,32,4096,1620,0,0,0,65536,0,0,65536,0,0
|
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57,570000,10000,0,0,193,110,33,4096,1712,0,0,0,65536,0,0,65536,0,0
|
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19,190000,10000,0,0,154,35,40,731,731,0,0,0,65536,0,0,65536,0,0
|
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20,200000,10000,0,0,154,35,38,567,567,0,0,0,65536,0,0,65536,0,0
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21,210000,10000,0,0,153,38,37,4096,0,0,0,0,65536,0,0,65536,0,0
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22,220000,10000,0,0,167,38,38,582,582,0,0,0,65536,0,0,65536,0,0
|
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23,230000,10000,0,0,176,10,38,685,685,0,0,0,65536,0,0,65536,0,0
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24,240000,10000,0,0,175,10,25,731,731,0,0,0,65536,0,0,65536,0,0
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25,250000,10000,0,0,196,11,23,731,731,0,0,0,65536,0,0,65536,0,0
|
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26,260000,10000,0,0,192,14,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,16,30,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,17,23,4096,0,0,0,0,65536,0,0,65536,0,0
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||||
29,290000,10000,0,0,164,17,27,4096,0,0,0,0,65536,0,0,65536,0,0
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30,300000,10000,0,0,154,18,26,685,685,0,0,0,65536,0,0,65536,0,0
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31,310000,10000,0,0,172,6,25,582,582,0,0,0,65536,0,0,65536,0,0
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32,320000,10000,0,0,180,9,22,567,567,0,0,0,65536,0,0,65536,0,0
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33,330000,10000,0,0,145,11,29,567,567,0,0,0,65536,0,0,65536,0,0
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34,340000,10000,0,0,203,14,30,582,582,0,0,0,65536,0,0,65536,0,0
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35,350000,10000,0,0,154,16,36,731,731,0,0,0,65536,0,0,65536,0,0
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36,360000,10000,0,0,144,18,32,4096,0,0,0,0,65536,0,0,65536,0,0
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37,370000,10000,0,0,144,18,29,4096,0,0,0,0,65536,0,0,65536,0,0
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38,380000,10000,0,0,132,18,28,4096,0,0,0,0,65536,0,0,65536,0,0
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39,390000,10000,0,0,180,18,24,4096,0,0,0,0,65536,0,0,65536,0,0
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40,400000,10000,0,0,220,23,20,4096,0,0,0,0,65536,0,0,65536,0,0
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41,410000,10000,0,0,215,25,19,4096,24,0,0,0,65536,0,0,65536,0,0
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42,420000,10000,0,0,208,32,20,4096,24,0,0,0,65536,0,0,65536,0,0
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43,430000,10000,0,0,177,36,19,4096,24,0,0,0,65536,0,0,65536,0,0
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44,440000,10000,0,0,199,42,20,4096,24,0,0,0,65536,0,0,65536,0,0
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45,450000,10000,0,0,223,47,19,4096,30,0,0,0,65536,0,0,65536,0,0
|
||||
46,460000,10000,0,0,202,50,17,4096,67,0,0,0,65536,0,0,65536,0,0
|
||||
47,470000,10000,0,0,218,57,18,4096,198,0,0,0,65536,0,0,65536,0,0
|
||||
48,480000,10000,0,0,221,60,20,4096,350,0,0,0,65536,0,0,65536,0,0
|
||||
49,490000,10000,0,0,225,66,20,4096,528,0,0,0,65536,0,0,65536,0,0
|
||||
50,500000,10000,0,0,214,69,21,4096,694,0,0,0,65536,0,0,65536,0,0
|
||||
51,510000,10000,0,0,227,71,23,4096,883,0,0,0,65536,0,0,65536,0,0
|
||||
52,520000,10000,0,0,208,71,23,4096,1043,0,0,0,65536,0,0,65536,0,0
|
||||
53,530000,10000,0,0,207,71,25,4096,1202,0,0,0,65536,0,0,65536,0,0
|
||||
54,540000,10000,0,0,200,71,26,4096,1319,0,0,0,65536,0,0,65536,0,0
|
||||
55,550000,10000,0,0,205,72,27,4096,1464,0,0,0,65536,0,0,65536,0,0
|
||||
56,560000,10000,0,0,211,73,27,4096,1620,0,0,0,65536,0,0,65536,0,0
|
||||
57,570000,10000,0,0,193,80,28,4096,1712,0,0,0,65536,0,0,65536,0,0
|
||||
58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
|
||||
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,7,65536,0,0,65536,0,0
|
||||
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,8,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,78,10,7,4096,0,0,0,9,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,101,13,7,4096,0,0,0,10,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,101,13,7,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,12,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,92,25,8,4096,2,0,0,14,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,64,27,8,4096,2,0,0,15,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,228,32,8,4096,210,0,0,22,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,256,34,9,4096,466,0,0,29,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,256,36,10,4096,722,0,0,36,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,256,34,9,4096,466,0,0,30,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,256,36,10,4096,722,0,0,37,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,256,36,11,4096,978,0,0,44,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,256,36,11,4096,1234,0,0,51,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,256,36,12,4096,1490,0,0,58,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,256,36,11,4096,1234,0,0,52,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,256,36,12,4096,1490,0,0,59,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,256,37,12,4096,1746,0,0,66,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,230,39,12,4096,1949,0,0,73,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,256,39,13,4096,2204,0,0,80,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,256,39,14,4096,2459,0,0,87,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,256,39,13,4096,2204,0,0,81,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,256,39,14,4096,2459,0,0,88,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,256,39,15,4096,2713,0,0,95,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,102,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,103,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,112,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,119,65536,0,1,65536,0,0
|
||||
21,210000,10000,0,0,256,41,17,4096,3736,0,0,126,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,134,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,141,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,120,65536,0,1,65536,0,0
|
||||
21,210000,10000,0,0,256,41,17,4096,3736,0,0,127,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,135,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,142,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,149,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,156,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,163,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,171,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,178,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,157,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,164,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,172,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,179,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,186,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,193,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,200,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,194,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,201,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,208,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,217,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,224,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,218,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,225,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,232,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,239,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,240,65536,0,1,65536,0,0
|
||||
|
||||
|
@@ -0,0 +1,95 @@
|
||||
tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_executions_delta,hot_word_count,avg_word_heat_q48,window_width,actual_window_size,predicted_label_hits,jitter_bits,apic_ticks,time_trust_q48,variance_q48,vm_call_depth_max,hera_heat_q48,hermes_heat_q48,artemis_heat_q48
|
||||
1,10000,10000,0,0,183,4,45,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,173,5,44,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,184,6,60,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,174,8,71,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,150,9,78,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,159,11,73,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,188,15,71,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,214,16,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,216,19,82,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,222,21,84,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,207,23,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,189,26,83,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,221,28,80,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,204,29,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,203,30,82,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,201,32,83,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,190,34,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,170,35,73,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,154,35,40,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
20,200000,10000,0,0,154,35,38,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
21,210000,10000,0,0,153,38,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
22,220000,10000,0,0,167,38,38,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
23,230000,10000,0,0,176,10,38,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
24,240000,10000,0,0,175,10,25,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,11,23,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,14,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,16,30,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,17,23,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
29,290000,10000,0,0,164,17,27,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
30,300000,10000,0,0,154,18,26,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
31,310000,10000,0,0,172,6,25,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
32,320000,10000,0,0,180,9,22,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
33,330000,10000,0,0,145,11,29,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
34,340000,10000,0,0,203,14,30,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
35,350000,10000,0,0,154,16,36,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
36,360000,10000,0,0,144,18,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
37,370000,10000,0,0,144,18,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
38,380000,10000,0,0,132,18,28,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
39,390000,10000,0,0,180,18,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
40,400000,10000,0,0,220,23,20,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
41,410000,10000,0,0,215,25,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
42,420000,10000,0,0,208,32,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
43,430000,10000,0,0,177,36,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
44,440000,10000,0,0,199,42,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
45,450000,10000,0,0,223,47,19,4096,30,0,0,0,65536,0,0,65536,0,0
|
||||
46,460000,10000,0,0,202,50,17,4096,67,0,0,0,65536,0,0,65536,0,0
|
||||
47,470000,10000,0,0,218,57,18,4096,198,0,0,0,65536,0,0,65536,0,0
|
||||
48,480000,10000,0,0,221,60,20,4096,350,0,0,0,65536,0,0,65536,0,0
|
||||
49,490000,10000,0,0,225,66,20,4096,528,0,0,0,65536,0,0,65536,0,0
|
||||
50,500000,10000,0,0,214,69,21,4096,694,0,0,0,65536,0,0,65536,0,0
|
||||
51,510000,10000,0,0,227,71,23,4096,883,0,0,0,65536,0,0,65536,0,0
|
||||
52,520000,10000,0,0,208,71,23,4096,1043,0,0,0,65536,0,0,65536,0,0
|
||||
53,530000,10000,0,0,207,71,25,4096,1202,0,0,0,65536,0,0,65536,0,0
|
||||
54,540000,10000,0,0,200,71,26,4096,1319,0,0,0,65536,0,0,65536,0,0
|
||||
55,550000,10000,0,0,205,72,27,4096,1464,0,0,0,65536,0,0,65536,0,0
|
||||
56,560000,10000,0,0,211,73,27,4096,1620,0,0,0,65536,0,0,65536,0,0
|
||||
57,570000,10000,0,0,193,80,28,4096,1712,0,0,0,65536,0,0,65536,0,0
|
||||
58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
|
||||
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,10,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,78,10,7,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,101,13,7,4096,0,0,0,13,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,13,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,92,25,8,4096,2,0,0,16,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,64,27,8,4096,2,0,0,17,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,228,32,8,4096,210,0,0,23,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,256,34,9,4096,466,0,0,29,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,256,36,10,4096,722,0,0,35,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,256,36,11,4096,978,0,0,42,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,256,36,11,4096,1234,0,0,48,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,256,36,12,4096,1490,0,0,54,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,256,37,12,4096,1746,0,0,60,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,230,39,12,4096,1949,0,0,66,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,256,39,13,4096,2204,0,0,72,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,256,39,14,4096,2459,0,0,78,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,256,39,15,4096,2713,0,0,84,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,91,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,97,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,103,65536,0,1,65536,0,0
|
||||
21,210000,10000,0,0,256,41,17,4096,3736,0,0,111,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,117,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,124,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,130,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,136,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,142,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,149,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,155,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,161,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,167,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,174,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,180,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,186,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,192,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,198,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,205,65536,0,1,65536,0,0
|
||||
|
@@ -0,0 +1,95 @@
|
||||
tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_executions_delta,hot_word_count,avg_word_heat_q48,window_width,actual_window_size,predicted_label_hits,jitter_bits,apic_ticks,time_trust_q48,variance_q48,vm_call_depth_max,hera_heat_q48,hermes_heat_q48,artemis_heat_q48
|
||||
1,10000,10000,0,0,183,4,45,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,173,5,44,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,184,6,60,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,174,8,71,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,150,9,78,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,159,11,73,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,188,15,71,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,214,16,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,216,19,82,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,222,21,84,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,207,23,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,189,26,83,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,221,28,80,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,204,29,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,203,30,82,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,201,32,83,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,190,34,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,170,35,73,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,154,35,40,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
20,200000,10000,0,0,154,35,38,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
21,210000,10000,0,0,153,38,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
22,220000,10000,0,0,167,38,38,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
23,230000,10000,0,0,176,10,38,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
24,240000,10000,0,0,175,10,25,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,11,23,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,14,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,16,30,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,17,23,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
29,290000,10000,0,0,164,17,27,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
30,300000,10000,0,0,154,18,26,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
31,310000,10000,0,0,172,6,25,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
32,320000,10000,0,0,180,9,22,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
33,330000,10000,0,0,145,11,29,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
34,340000,10000,0,0,203,14,30,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
35,350000,10000,0,0,154,16,36,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
36,360000,10000,0,0,144,18,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
37,370000,10000,0,0,144,18,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
38,380000,10000,0,0,132,18,28,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
39,390000,10000,0,0,180,18,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
40,400000,10000,0,0,220,23,20,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
41,410000,10000,0,0,215,25,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
42,420000,10000,0,0,208,32,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
43,430000,10000,0,0,177,36,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
44,440000,10000,0,0,199,42,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
45,450000,10000,0,0,223,47,19,4096,30,0,0,0,65536,0,0,65536,0,0
|
||||
46,460000,10000,0,0,202,50,17,4096,67,0,0,0,65536,0,0,65536,0,0
|
||||
47,470000,10000,0,0,218,57,18,4096,198,0,0,0,65536,0,0,65536,0,0
|
||||
48,480000,10000,0,0,221,60,20,4096,350,0,0,0,65536,0,0,65536,0,0
|
||||
49,490000,10000,0,0,225,66,20,4096,528,0,0,0,65536,0,0,65536,0,0
|
||||
50,500000,10000,0,0,214,69,21,4096,694,0,0,0,65536,0,0,65536,0,0
|
||||
51,510000,10000,0,0,227,71,23,4096,883,0,0,0,65536,0,0,65536,0,0
|
||||
52,520000,10000,0,0,208,71,23,4096,1043,0,0,0,65536,0,0,65536,0,0
|
||||
53,530000,10000,0,0,207,71,25,4096,1202,0,0,0,65536,0,0,65536,0,0
|
||||
54,540000,10000,0,0,200,71,26,4096,1319,0,0,0,65536,0,0,65536,0,0
|
||||
55,550000,10000,0,0,205,72,27,4096,1464,0,0,0,65536,0,0,65536,0,0
|
||||
56,560000,10000,0,0,211,73,27,4096,1620,0,0,0,65536,0,0,65536,0,0
|
||||
57,570000,10000,0,0,193,80,28,4096,1712,0,0,0,65536,0,0,65536,0,0
|
||||
58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
|
||||
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,8,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,78,10,7,4096,0,0,0,10,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,101,13,7,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,12,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,92,25,8,4096,2,0,0,15,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,64,27,8,4096,2,0,0,16,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,228,32,8,4096,210,0,0,22,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,256,34,9,4096,466,0,0,28,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,256,36,10,4096,722,0,0,34,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,256,36,11,4096,978,0,0,40,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,256,36,11,4096,1234,0,0,47,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,256,36,12,4096,1490,0,0,53,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,256,37,12,4096,1746,0,0,59,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,230,39,12,4096,1949,0,0,65,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,256,39,13,4096,2204,0,0,71,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,256,39,14,4096,2459,0,0,77,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,256,39,15,4096,2713,0,0,83,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,89,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,96,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,102,65536,0,1,65536,0,0
|
||||
21,210000,10000,0,0,256,41,17,4096,3736,0,0,108,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,116,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,122,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,128,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,135,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,141,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,147,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,153,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,160,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,166,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,172,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,178,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,185,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,191,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,197,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,203,65536,0,1,65536,0,0
|
||||
|
@@ -0,0 +1,95 @@
|
||||
tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_executions_delta,hot_word_count,avg_word_heat_q48,window_width,actual_window_size,predicted_label_hits,jitter_bits,apic_ticks,time_trust_q48,variance_q48,vm_call_depth_max,hera_heat_q48,hermes_heat_q48,artemis_heat_q48
|
||||
1,10000,10000,0,0,183,4,45,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,173,5,44,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,184,6,60,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,174,8,71,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,150,9,78,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,159,11,73,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,188,15,71,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,214,16,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,216,19,82,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,222,21,84,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,207,23,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,189,26,83,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,221,28,80,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,204,29,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,203,30,82,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,201,32,83,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,190,34,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,170,35,73,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,154,35,40,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
20,200000,10000,0,0,154,35,38,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
21,210000,10000,0,0,153,38,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
22,220000,10000,0,0,167,38,38,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
23,230000,10000,0,0,176,10,38,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
24,240000,10000,0,0,175,10,25,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,11,23,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,14,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,16,30,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,17,23,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
29,290000,10000,0,0,164,17,27,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
30,300000,10000,0,0,154,18,26,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
31,310000,10000,0,0,172,6,25,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
32,320000,10000,0,0,180,9,22,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
33,330000,10000,0,0,145,11,29,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
34,340000,10000,0,0,203,14,30,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
35,350000,10000,0,0,154,16,36,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
36,360000,10000,0,0,144,18,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
37,370000,10000,0,0,144,18,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
38,380000,10000,0,0,132,18,28,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
39,390000,10000,0,0,180,18,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
40,400000,10000,0,0,220,23,20,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
41,410000,10000,0,0,215,25,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
42,420000,10000,0,0,208,32,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
43,430000,10000,0,0,177,36,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
44,440000,10000,0,0,199,42,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
45,450000,10000,0,0,223,47,19,4096,30,0,0,0,65536,0,0,65536,0,0
|
||||
46,460000,10000,0,0,202,50,17,4096,67,0,0,0,65536,0,0,65536,0,0
|
||||
47,470000,10000,0,0,218,57,18,4096,198,0,0,0,65536,0,0,65536,0,0
|
||||
48,480000,10000,0,0,221,60,20,4096,350,0,0,0,65536,0,0,65536,0,0
|
||||
49,490000,10000,0,0,225,66,20,4096,528,0,0,0,65536,0,0,65536,0,0
|
||||
50,500000,10000,0,0,214,69,21,4096,694,0,0,0,65536,0,0,65536,0,0
|
||||
51,510000,10000,0,0,227,71,23,4096,883,0,0,0,65536,0,0,65536,0,0
|
||||
52,520000,10000,0,0,208,71,23,4096,1043,0,0,0,65536,0,0,65536,0,0
|
||||
53,530000,10000,0,0,207,71,25,4096,1202,0,0,0,65536,0,0,65536,0,0
|
||||
54,540000,10000,0,0,200,71,26,4096,1319,0,0,0,65536,0,0,65536,0,0
|
||||
55,550000,10000,0,0,205,72,27,4096,1464,0,0,0,65536,0,0,65536,0,0
|
||||
56,560000,10000,0,0,211,73,27,4096,1620,0,0,0,65536,0,0,65536,0,0
|
||||
57,570000,10000,0,0,193,80,28,4096,1712,0,0,0,65536,0,0,65536,0,0
|
||||
58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
|
||||
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,8,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,78,10,7,4096,0,0,0,9,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,101,13,7,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,12,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,92,25,8,4096,2,0,0,14,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,64,27,8,4096,2,0,0,15,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,228,32,8,4096,210,0,0,22,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,256,34,9,4096,466,0,0,30,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,256,36,10,4096,722,0,0,37,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,256,36,11,4096,978,0,0,44,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,256,36,11,4096,1234,0,0,52,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,256,36,12,4096,1490,0,0,59,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,256,37,12,4096,1746,0,0,66,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,230,39,12,4096,1949,0,0,73,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,256,39,13,4096,2204,0,0,81,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,256,39,14,4096,2459,0,0,88,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,256,39,15,4096,2713,0,0,95,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,103,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,112,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,120,65536,0,1,65536,0,0
|
||||
21,210000,10000,0,0,256,41,17,4096,3736,0,0,127,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,135,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,142,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,149,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,157,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,164,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,172,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,179,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,186,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,194,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,201,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,208,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,218,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,225,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,232,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,240,65536,0,1,65536,0,0
|
||||
|
@@ -31,11 +31,15 @@
|
||||
#define PCI_CFG_BAR5 0x24
|
||||
#define PCI_CFG_CAP_PTR 0x34
|
||||
#define PCI_CFG_INT_LINE 0x3C
|
||||
#define PCI_CFG_INT_PIN 0x3D /* 0=none, 1=INTA .. 4=INTD (item 4.3.5c/4.3.5d) */
|
||||
|
||||
/* PCI command register bits */
|
||||
#define PCI_CMD_IO_SPACE (1u << 0)
|
||||
#define PCI_CMD_MEM_SPACE (1u << 1)
|
||||
#define PCI_CMD_BUS_MASTER (1u << 2)
|
||||
#define PCI_CMD_INTX_DISABLE (1u << 10) /* item 4.3.5c/4.3.5e: pci_enable() never
|
||||
* clears this -- if firmware left it set,
|
||||
* INTx never asserts. Check explicitly. */
|
||||
|
||||
/* BAR type flags */
|
||||
#define PCI_BAR_TYPE_MASK 0x1u
|
||||
|
||||
@@ -0,0 +1,68 @@
|
||||
/*
|
||||
* virtio_input.h — Virtio 1.0 input device driver for StarKernel (item 4.3.5c)
|
||||
*
|
||||
* riscv64-only today (PCI transport, PLIC interrupt routing). aarch64's
|
||||
* 4.3.5e reuses this device identity/event shape over the same PCI
|
||||
* transport with GIC routing instead; riscv64/aarch64-specific pieces stay
|
||||
* in their own arch trees, not here.
|
||||
*
|
||||
* Interrupt-driven end to end: the driver pre-posts empty event buffers
|
||||
* into the eventq and the device fills+posts them asynchronously, signalled
|
||||
* by the PLIC (via 4.3.5b's claim/complete substrate) — no polling.
|
||||
*/
|
||||
|
||||
#ifndef STARKERNEL_VIRTIO_INPUT_H
|
||||
#define STARKERNEL_VIRTIO_INPUT_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* virtio PCI vendor (same device family as virtio-blk) */
|
||||
#define VIRTIO_INPUT_PCI_VENDOR_ID 0x1AF4u
|
||||
/* Modern-ID formula 0x1040 + VIRTIO_ID_INPUT, VIRTIO_ID_INPUT = 18, per
|
||||
* this build host's /usr/include/linux/virtio_ids.h. No legacy/transitional
|
||||
* ID exists for virtio-input (postdates the legacy 0.9.5 spec). */
|
||||
#define VIRTIO_INPUT_PCI_DEVICE_ID 0x1052u
|
||||
|
||||
/* struct virtio_input_event, per /usr/include/linux/virtio_input.h (BSD
|
||||
* licensed, same wire format this driver decodes). */
|
||||
typedef struct {
|
||||
uint16_t type;
|
||||
uint16_t code;
|
||||
uint32_t value;
|
||||
} VirtioInputEvent;
|
||||
|
||||
/* EV_KEY, per /usr/include/linux/input-event-codes.h */
|
||||
#define VIRTIO_INPUT_EV_KEY 0x01u
|
||||
|
||||
/*
|
||||
* virtio_input_find_keyboard — locate a virtio-keyboard-pci device on the
|
||||
* PCI bus, initialise the driver, compute and
|
||||
* enable its PLIC interrupt source (item
|
||||
* 4.3.5c's own derivation, FABRIC.md §27.5.2),
|
||||
* and pre-post the eventq's receive buffers.
|
||||
*
|
||||
* Returns 0 on success.
|
||||
* Returns -1 if no virtio-keyboard-pci device was found on the PCI bus.
|
||||
* Returns -2 on driver initialisation failure (bad BAR, queue setup, etc.).
|
||||
*/
|
||||
int virtio_input_find_keyboard(void);
|
||||
|
||||
/*
|
||||
* virtio_input_isr — called from riscv64_interrupt_handler() when the PLIC
|
||||
* claim matches this driver's computed source. Reads the
|
||||
* ISR-status capability (mandatory — the routed source
|
||||
* is level-triggered; skipping this leaves it latched),
|
||||
* drains the used ring, pushes decoded EV_KEY events into
|
||||
* the diagnostic ring buffer (keyboard_words.c), and
|
||||
* re-posts drained buffers to the eventq's avail ring.
|
||||
*/
|
||||
void virtio_input_isr(void);
|
||||
|
||||
/*
|
||||
* virtio_input_pop_event — diagnostic-ring consumer for keyboard_words.c's
|
||||
* VKBD-EVENT, same shape as i8042_pop_scancode().
|
||||
* Returns 1 and fills *code and *value if an event was available, 0 otherwise.
|
||||
*/
|
||||
int virtio_input_pop_event(uint16_t *code, uint32_t *value);
|
||||
|
||||
#endif /* STARKERNEL_VIRTIO_INPUT_H */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -24,6 +24,14 @@ extern void riscv64_install_vectors(void);
|
||||
* convention as riscv64_install_vectors above. */
|
||||
extern void riscv64_timer_rearm(void);
|
||||
|
||||
/* Defined in virtio_input.c (item 4.3.5c). g_virtio_input_plic_source is 0
|
||||
* (plic_claim()'s own "nothing pending" sentinel) until
|
||||
* virtio_input_find_keyboard() finds a real device and computes its
|
||||
* routed source -- so this branch is inert on any boot where the device
|
||||
* isn't present, same as the generic dispatch was inert before 4.3.5c. */
|
||||
extern uint32_t g_virtio_input_plic_source;
|
||||
extern void virtio_input_isr(void);
|
||||
|
||||
/* scause cause codes for supervisor-mode interrupts (RISC-V Privileged Spec
|
||||
* §4.1.9, Table "Supervisor cause register values"). */
|
||||
#define SCAUSE_INTERRUPT_BIT (1ULL << 63)
|
||||
@@ -51,14 +59,12 @@ volatile uint32_t g_plic_claim_count = 0;
|
||||
* permanently and silently. Ordering it ahead of @c heartbeat_tick() means a
|
||||
* fault in the bookkeeping cannot also cost the next tick.
|
||||
*
|
||||
* Supervisor external (cause 9, item 4.3.5b): claim/dispatch/complete
|
||||
* through the PLIC. No source is enabled by default (see plic.c), so this
|
||||
* branch is normally never reached; a future consumer enabling its own
|
||||
* source is what makes it fire. Dispatch here is deliberately generic --
|
||||
* this item is pure PLIC substrate, not a device driver -- a future
|
||||
* consumer (4.3.5c) is expected to extend this with real per-source
|
||||
* handling, the same way i8042's keyboard branch sits in amd64's
|
||||
* isr_common_handler().
|
||||
* Supervisor external (cause 9): claim/dispatch/complete through the PLIC
|
||||
* (substrate, item 4.3.5b). Source 10 (UART) stays unclaimed by anything
|
||||
* here -- 4.3.5b's own synthetic-interrupt self-test that used it was run
|
||||
* once and reverted, not a standing consumer. virtio-input (item 4.3.5c)
|
||||
* is the first real per-source dispatch, the same shape as i8042's
|
||||
* keyboard branch in amd64's isr_common_handler().
|
||||
*
|
||||
* Any other cause is ignored rather than fatal: an unexpected-but-harmless
|
||||
* asynchronous interrupt should not take the kernel down.
|
||||
@@ -76,6 +82,9 @@ void riscv64_interrupt_handler(uint64_t scause)
|
||||
uint32_t irq = plic_claim();
|
||||
if (irq != 0) {
|
||||
g_plic_claim_count++;
|
||||
if (irq == g_virtio_input_plic_source) {
|
||||
virtio_input_isr();
|
||||
}
|
||||
plic_complete(irq);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -63,6 +63,7 @@ EFI_RUNTIME_SERVICES *g_sk_runtime_services = NULL;
|
||||
#include "starkernel/repl.h"
|
||||
#include "starkernel/pci.h"
|
||||
#include "starkernel/virtio_blk.h"
|
||||
#include "starkernel/virtio_input.h"
|
||||
#include "block_subsystem.h"
|
||||
#include "vm.h" /* DictEntry, vm_find_word, ACL_MODE_STRICT */
|
||||
#include "version.h"
|
||||
@@ -584,6 +585,14 @@ static void kernel_main_deep(BootInfo *boot_info) {
|
||||
}
|
||||
}
|
||||
|
||||
/* item 4.3.5c: virtio-keyboard-pci, riscv64 only today. Unconditional
|
||||
* call site, same as virtio_blk_find_artemis() above -- the function
|
||||
* itself no-ops with a console message on architectures/boards where
|
||||
* the device isn't present or interrupt routing isn't implemented yet
|
||||
* (see virtio_input.c's enable_interrupt_route()), so dictionary/boot
|
||||
* sequence parity across all three architectures is unaffected. */
|
||||
(void)virtio_input_find_keyboard();
|
||||
|
||||
/* Copy capsule directory header to heap (has pointer field needing update) */
|
||||
CapsuleDirHeader *live_dir = (CapsuleDirHeader *)kmalloc(sizeof(CapsuleDirHeader));
|
||||
if (!live_dir) {
|
||||
|
||||
@@ -0,0 +1,514 @@
|
||||
/*
|
||||
* virtio_input.c — Virtio 1.0 input device driver for StarKernel (item 4.3.5c)
|
||||
*
|
||||
* Modern virtio 1.0 interface only (device ID 0x1052). No legacy fallback
|
||||
* exists for virtio-input (unlike virtio-blk's 0x1001) -- input postdates
|
||||
* the legacy 0.9.5 spec.
|
||||
*
|
||||
* Split virtqueue (eventq, index 0) with pre-posted device-writable
|
||||
* buffers: unlike virtio_blk.c's synchronous request/response pattern, the
|
||||
* driver posts empty VirtioInputEvent buffers up front and the device
|
||||
* fills+posts them to the used ring asynchronously, signalled by the PLIC
|
||||
* (see virtio_input_isr(), called from arch/riscv64/interrupts.c on a
|
||||
* matching claim) -- no polling anywhere in this path.
|
||||
*
|
||||
* The PCI capability walker below is a deliberate duplicate of
|
||||
* virtio_blk.c's static walk_virtio_caps(), not a shared/promoted version
|
||||
* -- decided at this item rather than refactoring the working, tested
|
||||
* virtio_blk.c (FABRIC.md item 4.3.5c note, carries forward to 4.3.5e).
|
||||
*
|
||||
* Interrupt routing (PLIC source computation/enable) is riscv64-specific
|
||||
* and arch-guarded below; the capability walk, feature negotiation, and
|
||||
* queue/event handling are arch-agnostic and compiled for all three
|
||||
* targets (same idiom as pci.c itself: config-space access already
|
||||
* differs per arch internally, this file adds one more arch-guarded
|
||||
* piece on top rather than a second copy of the whole file).
|
||||
*/
|
||||
|
||||
#ifndef __STARKERNEL__
|
||||
#error "virtio_input.c is kernel-only"
|
||||
#endif
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "starkernel/pci.h"
|
||||
#include "starkernel/virtio_input.h"
|
||||
#include "starkernel/kmalloc.h"
|
||||
#include "console.h"
|
||||
|
||||
#if defined(ARCH_RISCV64)
|
||||
#include "starkernel/plic.h"
|
||||
#endif
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Virtio 1.0 PCI capability structures -- duplicated from virtio_blk.c
|
||||
* (see file header for why), plus VIRTIO_PCI_CAP_ISR_CFG actually used
|
||||
* here (virtio_blk.c defines the constant but never reads it -- blk polls
|
||||
* and never needed to; this is the first interrupt-driven virtio-pci
|
||||
* device in this tree).
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
#define VIRTIO_PCI_CAP_VENDOR_ID 0x09u
|
||||
|
||||
#define VIRTIO_PCI_CAP_COMMON_CFG 1u
|
||||
#define VIRTIO_PCI_CAP_NOTIFY_CFG 2u
|
||||
#define VIRTIO_PCI_CAP_ISR_CFG 3u
|
||||
|
||||
#define VCAP_OFF_CAP_VNDR 0u
|
||||
#define VCAP_OFF_CAP_NEXT 1u
|
||||
#define VCAP_OFF_CFG_TYPE 3u
|
||||
#define VCAP_OFF_BAR 4u
|
||||
#define VCAP_OFF_OFFSET 8u
|
||||
#define VCAP_OFF_LENGTH 12u
|
||||
#define VCAP_OFF_NOTIFY_MULT 16u
|
||||
|
||||
/* virtio common config (MMIO layout, virtio 1.0 §4.1.4.3) -- not packed,
|
||||
* same rationale as virtio_blk.c's VirtioCommonCfg (riscv64 strict
|
||||
* alignment; QEMU's common-cfg MMIO handler mishandles byte reads of the
|
||||
* 16-bit fields otherwise). */
|
||||
typedef struct {
|
||||
volatile uint32_t device_feature_select;
|
||||
volatile uint32_t device_feature;
|
||||
volatile uint32_t driver_feature_select;
|
||||
volatile uint32_t driver_feature;
|
||||
volatile uint16_t config_msix_vector;
|
||||
volatile uint16_t num_queues;
|
||||
volatile uint8_t device_status;
|
||||
volatile uint8_t config_generation;
|
||||
volatile uint16_t queue_select;
|
||||
volatile uint16_t queue_size;
|
||||
volatile uint16_t queue_msix_vector;
|
||||
volatile uint16_t queue_enable;
|
||||
volatile uint16_t queue_notify_off;
|
||||
volatile uint64_t queue_desc;
|
||||
volatile uint64_t queue_driver;
|
||||
volatile uint64_t queue_device;
|
||||
volatile uint16_t queue_notify_data;
|
||||
volatile uint16_t queue_reset;
|
||||
} VirtioCommonCfg;
|
||||
|
||||
#define VIRTIO_STATUS_ACKNOWLEDGE 0x01u
|
||||
#define VIRTIO_STATUS_DRIVER 0x02u
|
||||
#define VIRTIO_STATUS_DRIVER_OK 0x04u
|
||||
#define VIRTIO_STATUS_FEATURES_OK 0x08u
|
||||
#define VIRTIO_STATUS_FAILED 0x80u
|
||||
|
||||
#define VIRTIO_F_VERSION_1 (1ULL << 32)
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Split virtqueue structures (virtio 1.0 §2.6) -- duplicated shape from
|
||||
* virtio_blk.c, sized for the event queue instead.
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
#define EVENTQ_SIZE 8u /* power of 2; headroom for several queued events */
|
||||
|
||||
#define VRING_DESC_F_WRITE 2u
|
||||
|
||||
typedef struct {
|
||||
uint64_t addr;
|
||||
uint32_t len;
|
||||
uint16_t flags;
|
||||
uint16_t next;
|
||||
} VirtqDesc;
|
||||
|
||||
typedef struct {
|
||||
uint16_t flags;
|
||||
uint16_t idx;
|
||||
uint16_t ring[EVENTQ_SIZE];
|
||||
uint16_t used_event;
|
||||
} VirtqAvail;
|
||||
|
||||
typedef struct {
|
||||
uint32_t id;
|
||||
uint32_t len;
|
||||
} VirtqUsedElem;
|
||||
|
||||
typedef struct {
|
||||
uint16_t flags;
|
||||
uint16_t idx;
|
||||
VirtqUsedElem ring[EVENTQ_SIZE];
|
||||
uint16_t avail_event;
|
||||
} VirtqUsed;
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Diagnostic ring -- consumed by keyboard_words.c's VKBD-EVENT, same
|
||||
* relationship KBD-SCAN has to i8042's ring (raw hardware-boundary peek,
|
||||
* no scancode-to-ASCII layout, no REPL wiring -- that's 4.3.5f/M8).
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
#define DIAG_RING_SIZE 16u
|
||||
|
||||
typedef struct {
|
||||
uint16_t code;
|
||||
uint32_t value;
|
||||
} DiagEvent;
|
||||
|
||||
static DiagEvent g_diag_ring[DIAG_RING_SIZE];
|
||||
static volatile uint32_t g_diag_head = 0;
|
||||
static volatile uint32_t g_diag_tail = 0;
|
||||
|
||||
static void diag_push(uint16_t code, uint32_t value)
|
||||
{
|
||||
uint32_t next = (g_diag_head + 1u) % DIAG_RING_SIZE;
|
||||
if (next == g_diag_tail) return; /* full: drop, same as i8042's bounded ring */
|
||||
g_diag_ring[g_diag_head].code = code;
|
||||
g_diag_ring[g_diag_head].value = value;
|
||||
g_diag_head = next;
|
||||
}
|
||||
|
||||
int virtio_input_pop_event(uint16_t *code, uint32_t *value)
|
||||
{
|
||||
if (g_diag_tail == g_diag_head) return 0;
|
||||
if (code) *code = g_diag_ring[g_diag_tail].code;
|
||||
if (value) *value = g_diag_ring[g_diag_tail].value;
|
||||
g_diag_tail = (g_diag_tail + 1u) % DIAG_RING_SIZE;
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Standing diagnostic, same shape as g_plic_claim_count/g_i8042_isr_count. */
|
||||
volatile uint32_t g_virtio_input_isr_count = 0;
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Driver state
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
typedef struct {
|
||||
VirtioCommonCfg *common;
|
||||
volatile uint16_t *notify;
|
||||
uint32_t notify_off_mult;
|
||||
uint16_t queue_notify_off;
|
||||
volatile uint8_t *isr_status; /* VIRTIO_PCI_CAP_ISR_CFG -- read to
|
||||
* deassert the (level-triggered) line */
|
||||
|
||||
VirtqDesc *desc;
|
||||
VirtqAvail *avail;
|
||||
VirtqUsed *used;
|
||||
|
||||
VirtioInputEvent *bufs; /* EVENTQ_SIZE event buffers, device-writable */
|
||||
uint16_t avail_idx;
|
||||
uint16_t last_used_idx;
|
||||
} VirtInputState;
|
||||
|
||||
static VirtInputState g_vinput;
|
||||
static int g_vinput_ready = 0;
|
||||
|
||||
/* PLIC source (riscv64) this device's INTx routes to, computed at init.
|
||||
* 0 = invalid/not found -- matches plic_claim()'s own "0 = nothing
|
||||
* pending" sentinel, so an unfound device can never accidentally match a
|
||||
* real claim. Checked by arch/riscv64/interrupts.c's dispatch. */
|
||||
uint32_t g_virtio_input_plic_source = 0;
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Capability walker -- duplicated from virtio_blk.c, see file header.
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
static void *walk_virtio_caps(const PciDevice *d, uint8_t cap_type,
|
||||
uint32_t *extra_out) {
|
||||
uint8_t cap_ptr = pci_read8(d, (uint16_t)PCI_CFG_CAP_PTR) & 0xFCu;
|
||||
if (!cap_ptr) return NULL;
|
||||
|
||||
int limit = 48;
|
||||
while (cap_ptr && limit--) {
|
||||
uint8_t vndr = pci_read8(d, cap_ptr + (uint16_t)VCAP_OFF_CAP_VNDR);
|
||||
uint8_t next = pci_read8(d, cap_ptr + (uint16_t)VCAP_OFF_CAP_NEXT);
|
||||
uint8_t ctype = pci_read8(d, cap_ptr + (uint16_t)VCAP_OFF_CFG_TYPE);
|
||||
|
||||
if (vndr == (uint8_t)VIRTIO_PCI_CAP_VENDOR_ID && ctype == cap_type) {
|
||||
uint8_t bar = pci_read8 (d, cap_ptr + (uint16_t)VCAP_OFF_BAR);
|
||||
uint32_t offset = pci_read32(d, cap_ptr + (uint16_t)VCAP_OFF_OFFSET);
|
||||
uint32_t length = pci_read32(d, cap_ptr + (uint16_t)VCAP_OFF_LENGTH);
|
||||
|
||||
if (bar > 5u) { cap_ptr = next & 0xFCu; continue; }
|
||||
|
||||
uint64_t bar_base = pci_bar(d, (int)bar);
|
||||
if (!bar_base) { cap_ptr = next & 0xFCu; continue; }
|
||||
|
||||
if (pci_map_bar(bar_base, (uint64_t)length + offset) != 0) {
|
||||
cap_ptr = next & 0xFCu; continue;
|
||||
}
|
||||
|
||||
if (extra_out && cap_type == VIRTIO_PCI_CAP_NOTIFY_CFG) {
|
||||
*extra_out = pci_read32(d, cap_ptr + (uint16_t)VCAP_OFF_NOTIFY_MULT);
|
||||
}
|
||||
|
||||
return (void *)(uintptr_t)(bar_base + offset);
|
||||
}
|
||||
|
||||
cap_ptr = next & 0xFCu;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void wmb(void) {
|
||||
/* Compiler barrier only, same as virtio_blk.c -- reported not fixed
|
||||
* there (FABRIC.md item 4.3.5e note); this item is the first place an
|
||||
* interrupt-driven used-ring (device writes concurrently with the
|
||||
* driver's re-post loop) leans on the ordering harder than blk's
|
||||
* synchronous polled loop ever did. */
|
||||
__asm__ volatile("" : : : "memory");
|
||||
}
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Interrupt routing -- riscv64 (PLIC). aarch64 (GIC, item 4.3.5e) is not
|
||||
* yet implemented; the #else path reports rather than silently no-ops, so
|
||||
* a future arch attempting to use this file without adding its own
|
||||
* routing fails loudly instead of "working" with a permanently-pending,
|
||||
* never-enabled source.
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
#if defined(ARCH_RISCV64)
|
||||
static int enable_interrupt_route(const PciDevice *pci)
|
||||
{
|
||||
uint8_t pin = pci_read8(pci, (uint16_t)PCI_CFG_INT_PIN);
|
||||
if (pin < 1u || pin > 4u) {
|
||||
console_println("virtio-input: bad/absent INT_PIN");
|
||||
return -1;
|
||||
}
|
||||
uint32_t slot = pci->device;
|
||||
uint32_t source = 32u + ((slot + (uint32_t)pin - 1u) % 4u);
|
||||
|
||||
plic_set_priority(source, 1u);
|
||||
plic_enable(source);
|
||||
|
||||
g_virtio_input_plic_source = source;
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static int enable_interrupt_route(const PciDevice *pci)
|
||||
{
|
||||
(void)pci;
|
||||
console_println("virtio-input: interrupt routing not implemented on this arch");
|
||||
return -1;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Device initialisation -- status/feature negotiation mirrors
|
||||
* vblk_init_device() (virtio_blk.c:361-499); differences noted inline.
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
static int vinput_init_device(const PciDevice *pci) {
|
||||
VirtInputState *s = &g_vinput;
|
||||
|
||||
pci_enable(pci);
|
||||
|
||||
/* pci_enable() only sets IO/MEM/BUS_MASTER -- it never clears PCI
|
||||
* COMMAND bit 10 (Interrupt Disable). If firmware left it set, INTx
|
||||
* never asserts and every step below "succeeds" while producing zero
|
||||
* real interrupts (FABRIC.md item 4.3.5c/4.3.5e note). Check and clear
|
||||
* explicitly. */
|
||||
{
|
||||
uint16_t cmd = pci_read16(pci, (uint16_t)PCI_CFG_COMMAND);
|
||||
if (cmd & (uint16_t)PCI_CMD_INTX_DISABLE) {
|
||||
pci_write16(pci, (uint16_t)PCI_CFG_COMMAND,
|
||||
cmd & (uint16_t)~PCI_CMD_INTX_DISABLE);
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t notify_mult = 0;
|
||||
VirtioCommonCfg *common = (VirtioCommonCfg *)
|
||||
walk_virtio_caps(pci, VIRTIO_PCI_CAP_COMMON_CFG, NULL);
|
||||
volatile uint16_t *notify = (volatile uint16_t *)
|
||||
walk_virtio_caps(pci, VIRTIO_PCI_CAP_NOTIFY_CFG, ¬ify_mult);
|
||||
volatile uint8_t *isr_status = (volatile uint8_t *)
|
||||
walk_virtio_caps(pci, VIRTIO_PCI_CAP_ISR_CFG, NULL);
|
||||
|
||||
if (!common || !notify || !isr_status) {
|
||||
console_println("virtio-input: cap walk failed");
|
||||
return -2;
|
||||
}
|
||||
|
||||
s->common = common;
|
||||
s->notify = notify;
|
||||
s->notify_off_mult = notify_mult;
|
||||
s->isr_status = isr_status;
|
||||
|
||||
common->device_status = 0;
|
||||
wmb();
|
||||
common->device_status = (uint8_t)VIRTIO_STATUS_ACKNOWLEDGE;
|
||||
wmb();
|
||||
common->device_status = (uint8_t)(VIRTIO_STATUS_ACKNOWLEDGE | VIRTIO_STATUS_DRIVER);
|
||||
wmb();
|
||||
|
||||
common->driver_feature_select = 1;
|
||||
wmb();
|
||||
common->driver_feature = (uint32_t)(VIRTIO_F_VERSION_1 >> 32);
|
||||
common->driver_feature_select = 0;
|
||||
wmb();
|
||||
common->driver_feature = 0;
|
||||
wmb();
|
||||
|
||||
common->device_status = (uint8_t)(VIRTIO_STATUS_ACKNOWLEDGE |
|
||||
VIRTIO_STATUS_DRIVER |
|
||||
VIRTIO_STATUS_FEATURES_OK);
|
||||
wmb();
|
||||
if (!(common->device_status & (uint8_t)VIRTIO_STATUS_FEATURES_OK)) {
|
||||
console_println("virtio-input: FEATURES_OK rejected");
|
||||
common->device_status = (uint8_t)VIRTIO_STATUS_FAILED;
|
||||
return -2;
|
||||
}
|
||||
|
||||
/* Queue 0 = eventq (device-to-driver key events). Queue 1 = statusq
|
||||
* (driver-to-device, e.g. LED state) -- not needed to read keypresses;
|
||||
* left unconfigured, consistent with this item's scope (input, not
|
||||
* output reports). Read num_queues back rather than assume 2. */
|
||||
if (common->num_queues < 1u) {
|
||||
console_println("virtio-input: no queues reported");
|
||||
return -2;
|
||||
}
|
||||
|
||||
common->queue_select = 0;
|
||||
wmb();
|
||||
uint16_t max_size = common->queue_size;
|
||||
if (max_size == 0u) {
|
||||
console_println("virtio-input: bad eventq size");
|
||||
return -2;
|
||||
}
|
||||
uint16_t qsize = (max_size < (uint16_t)EVENTQ_SIZE)
|
||||
? max_size : (uint16_t)EVENTQ_SIZE;
|
||||
common->queue_size = qsize;
|
||||
s->queue_notify_off = common->queue_notify_off;
|
||||
wmb();
|
||||
|
||||
common->config_msix_vector = 0xFFFFu;
|
||||
common->queue_msix_vector = 0xFFFFu;
|
||||
wmb();
|
||||
|
||||
size_t desc_bytes = (size_t)qsize * sizeof(VirtqDesc);
|
||||
size_t avail_bytes = sizeof(uint16_t) * 2u +
|
||||
(size_t)qsize * sizeof(uint16_t) + sizeof(uint16_t);
|
||||
size_t used_bytes = sizeof(uint16_t) * 2u +
|
||||
(size_t)qsize * sizeof(VirtqUsedElem) + sizeof(uint16_t);
|
||||
|
||||
s->desc = (VirtqDesc *) kmalloc_aligned(desc_bytes, 64);
|
||||
s->avail = (VirtqAvail *)kmalloc_aligned(avail_bytes, 2);
|
||||
s->used = (VirtqUsed *) kmalloc_aligned(used_bytes, 4);
|
||||
s->bufs = (VirtioInputEvent *)
|
||||
kmalloc_aligned((size_t)qsize * sizeof(VirtioInputEvent), 8);
|
||||
if (!s->desc || !s->avail || !s->used || !s->bufs) {
|
||||
console_println("virtio-input: alloc failed");
|
||||
return -2;
|
||||
}
|
||||
memset(s->desc, 0, desc_bytes);
|
||||
memset(s->avail, 0, avail_bytes);
|
||||
memset(s->used, 0, used_bytes);
|
||||
memset(s->bufs, 0, (size_t)qsize * sizeof(VirtioInputEvent));
|
||||
|
||||
s->avail_idx = 0;
|
||||
s->last_used_idx = 0;
|
||||
|
||||
common->queue_desc = (uint64_t)(uintptr_t)s->desc;
|
||||
common->queue_driver = (uint64_t)(uintptr_t)s->avail;
|
||||
common->queue_device = (uint64_t)(uintptr_t)s->used;
|
||||
wmb();
|
||||
common->queue_enable = 1;
|
||||
wmb();
|
||||
|
||||
/* Pre-post every buffer, device-writable, single descriptor each
|
||||
* (events are fixed 8-byte structs, no chaining needed) -- unlike
|
||||
* vblk_io()'s per-request chain-of-three, this posts the whole queue
|
||||
* up front and never waits synchronously; the device fills them
|
||||
* asynchronously as real input events arrive. */
|
||||
uint16_t i;
|
||||
for (i = 0; i < qsize; i++) {
|
||||
s->desc[i].addr = (uint64_t)(uintptr_t)&s->bufs[i];
|
||||
s->desc[i].len = (uint32_t)sizeof(VirtioInputEvent);
|
||||
s->desc[i].flags = (uint16_t)VRING_DESC_F_WRITE;
|
||||
s->desc[i].next = 0;
|
||||
|
||||
s->avail->ring[i] = i;
|
||||
}
|
||||
wmb();
|
||||
s->avail->idx = qsize;
|
||||
s->avail_idx = qsize;
|
||||
wmb();
|
||||
|
||||
uint16_t notify_idx = (uint16_t)(s->queue_notify_off *
|
||||
(s->notify_off_mult & 0xFFFFu));
|
||||
volatile uint16_t *doorbell = s->notify + notify_idx;
|
||||
*doorbell = 0;
|
||||
wmb();
|
||||
|
||||
if (enable_interrupt_route(pci) != 0) {
|
||||
console_println("virtio-input: interrupt route unavailable, device idle");
|
||||
return -2;
|
||||
}
|
||||
|
||||
common->device_status = (uint8_t)(VIRTIO_STATUS_ACKNOWLEDGE |
|
||||
VIRTIO_STATUS_DRIVER |
|
||||
VIRTIO_STATUS_FEATURES_OK |
|
||||
VIRTIO_STATUS_DRIVER_OK);
|
||||
wmb();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int virtio_input_find_keyboard(void) {
|
||||
PciDevice pci;
|
||||
int found = pci_find_first(VIRTIO_INPUT_PCI_VENDOR_ID,
|
||||
VIRTIO_INPUT_PCI_DEVICE_ID, &pci);
|
||||
if (found != 0) {
|
||||
console_println("virtio-input: no device on PCI bus 0");
|
||||
return -1;
|
||||
}
|
||||
|
||||
console_println("virtio-input: found device");
|
||||
|
||||
int rc = vinput_init_device(&pci);
|
||||
if (rc != 0) return rc;
|
||||
|
||||
g_vinput_ready = 1;
|
||||
console_println("virtio-input: driver ready");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Interrupt path -- called from arch/riscv64/interrupts.c on a matching
|
||||
* PLIC claim (g_virtio_input_plic_source).
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
void virtio_input_isr(void) {
|
||||
VirtInputState *s = &g_vinput;
|
||||
if (!g_vinput_ready) return;
|
||||
|
||||
g_virtio_input_isr_count++;
|
||||
|
||||
/* Mandatory: reading ISR status is what deasserts the (level-triggered,
|
||||
* per FABRIC.md §27.5.2's decoded interrupt-map flags) line. Skipping
|
||||
* this leaves the PLIC source's condition latched -- storm or hang,
|
||||
* not a subtle bug (same finding 4.3.5e's plan flags). */
|
||||
(void)*s->isr_status;
|
||||
|
||||
while (s->used->idx != s->last_used_idx) {
|
||||
uint16_t used_slot = s->last_used_idx % EVENTQ_SIZE;
|
||||
uint32_t desc_id = s->used->ring[used_slot].id;
|
||||
VirtioInputEvent *ev = &s->bufs[desc_id];
|
||||
|
||||
if (ev->type == (uint16_t)VIRTIO_INPUT_EV_KEY) {
|
||||
diag_push(ev->code, ev->value);
|
||||
}
|
||||
/* EV_SYN and other event types are received but not surfaced to
|
||||
* the diagnostic ring -- this item decodes EV_KEY specifically,
|
||||
* per its own scope; a full input-event model is later/REPL work. */
|
||||
|
||||
/* Re-post this buffer immediately -- same descriptor, still
|
||||
* device-writable, not re-initialised (already zeroed content
|
||||
* doesn't matter, the device overwrites it in full each time). */
|
||||
uint16_t avail_slot = s->avail_idx % EVENTQ_SIZE;
|
||||
s->avail->ring[avail_slot] = (uint16_t)desc_id;
|
||||
wmb();
|
||||
s->avail_idx++;
|
||||
s->avail->idx = s->avail_idx;
|
||||
wmb();
|
||||
|
||||
s->last_used_idx++;
|
||||
}
|
||||
|
||||
uint16_t notify_idx = (uint16_t)(s->queue_notify_off *
|
||||
(s->notify_off_mult & 0xFFFFu));
|
||||
volatile uint16_t *doorbell = s->notify + notify_idx;
|
||||
*doorbell = 0;
|
||||
wmb();
|
||||
}
|
||||
@@ -32,6 +32,14 @@
|
||||
* @par KBD-DEBUG ( -- isr_count spurious_count )
|
||||
* Standing diagnostic: count of real keyboard IRQs serviced and count of
|
||||
* LAPIC spurious-vector interrupts, both since boot.
|
||||
*
|
||||
* @par VKBD-EVENT ( -- code value -1 | 0 )
|
||||
* Item 4.3.5c. Pop one decoded EV_KEY event (Linux input-event code/value
|
||||
* pair) off the virtio-input interrupt-fed ring buffer. Kernel-only,
|
||||
* riscv64-only today (virtio-keyboard-pci); no-op elsewhere.
|
||||
*
|
||||
* @par VKBD-DEBUG ( -- isr_count )
|
||||
* Standing diagnostic: count of virtio-input ISR invocations since boot.
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
@@ -17,6 +17,10 @@
|
||||
#include "starkernel/i8042.h"
|
||||
#endif
|
||||
|
||||
#if defined(__STARKERNEL__) && defined(ARCH_RISCV64)
|
||||
#include "starkernel/virtio_input.h"
|
||||
#endif
|
||||
|
||||
/* KBD-SCAN ( -- c -1 | 0 ) */
|
||||
static void kbw_scan(VM *vm)
|
||||
{
|
||||
@@ -50,8 +54,46 @@ static void kbw_debug(VM *vm)
|
||||
#endif
|
||||
}
|
||||
|
||||
/* VKBD-EVENT ( -- code value -1 | 0 ): item 4.3.5c, riscv64 virtio-input.
|
||||
* Pop one decoded EV_KEY event off the interrupt-fed ring buffer. Pushes
|
||||
* code and value and -1 (true) if one was available, or just 0 (false) if
|
||||
* the buffer was empty. Distinct word from KBD-SCAN rather than a shared
|
||||
* one: different device, different event shape (Linux-style code/value
|
||||
* pair vs. a raw XT scancode byte) -- convergence onto one interface is
|
||||
* item 4.3.5f's explicit job, not this one's. */
|
||||
static void kbw_vevent(VM *vm)
|
||||
{
|
||||
#if defined(__STARKERNEL__) && defined(ARCH_RISCV64)
|
||||
uint16_t code;
|
||||
uint32_t value;
|
||||
if (virtio_input_pop_event(&code, &value)) {
|
||||
vm_push(vm, (cell_t)code);
|
||||
vm_push(vm, (cell_t)value);
|
||||
vm_push(vm, -1);
|
||||
} else {
|
||||
vm_push(vm, 0);
|
||||
}
|
||||
#else
|
||||
vm_push(vm, 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* VKBD-DEBUG ( -- isr_count ): standing diagnostic, same shape as
|
||||
* KBD-DEBUG -- confirms the virtio-input interrupt path is alive. */
|
||||
extern volatile uint32_t g_virtio_input_isr_count;
|
||||
static void kbw_vdebug(VM *vm)
|
||||
{
|
||||
#if defined(__STARKERNEL__) && defined(ARCH_RISCV64)
|
||||
vm_push(vm, (cell_t)g_virtio_input_isr_count);
|
||||
#else
|
||||
vm_push(vm, 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
void register_keyboard_words(VM *vm)
|
||||
{
|
||||
register_word(vm, "KBD-SCAN", kbw_scan);
|
||||
register_word(vm, "KBD-DEBUG", kbw_debug);
|
||||
register_word(vm, "VKBD-EVENT", kbw_vevent);
|
||||
register_word(vm, "VKBD-DEBUG", kbw_vdebug);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user