Robert Allan JamesandClaude Sonnet 5 f43f3f4482 aarch64: detect exception level at runtime, cached accessor
Punch list §25 item 0.4 complete.

Adds aarch64_current_el() in arch.c: reads CurrentEL[3:2] on first call,
caches the result (CurrentEL cannot change post-ExitBootServices, so every
consumer gets the same answer without repeating the MRS). Called from
arch_interrupts_init() in interrupts.c -- the earliest point with both a
working console (up since M1) and a genuine first consumer (vector
installation is the first EL-dependent operation) -- and the detected level
is printed to the boot log there.

Declared via extern-in-place in interrupts.c rather than added to the shared
arch.h: "exception level" has no amd64/riscv64 equivalent, matching the
convention already used for riscv64_timer_rearm() in item 0.3.

Verified on real QEMU output: "AArch64: running at EL1", correctly positioned
immediately before "IDT installed." in the serial log. Boots clean, dict_hash
0x3d4e1daf289da94f unchanged from the item 0.1-0.3 baseline.

Scope: this item establishes the detection and exposes it; it does not yet
change VBAR/ELR/SPSR or timer-register selection to use it. arch_interrupts_init()
still writes VBAR_EL1 unconditionally, and now says so explicitly in its own
doc comment -- if aarch64_current_el() ever reports 2 on real hardware,
exceptions taken at EL2 vector through VBAR_EL2, which nothing programs yet.
That gap is items 0.5 (vectors/saved-state) and 0.7 (CNTP vs CNTHP) to close,
per FABRIC.md's GAP-B3 finding. The boot-log EL2 case prints a note pointing
at both.

Only aarch64-scoped files touched (arch.c, interrupts.c) -- no shared loader
or header changed, so amd64 and riscv64 are provably unaffected; not rebuilt
for this item.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
2026-08-03 18:30:25 -04:00
2026-08-01 07:49:56 -04:00
2026-08-02 05:11:24 -04:00
2026-08-01 07:49:56 -04:00
2026-08-01 07:49:56 -04:00
2026-08-01 15:51:53 -04:00
2026-08-02 05:11:24 -04:00

LithosAnanke v1.5.4

UEFI-bootable FORTH microkernel. Boots from firmware, initialises memory and interrupts, then runs the StarForth VM as its sole userspace runtime. No libc. No OS. Just stone and necessity.

Lithos (foundation) + Ananke (necessity) — the kernel under StarshipOS.


Status — M7.1 (Capsule System · Multi-VM Fleet)

Milestone Status
M0M6 UEFI boot · PMM · VMM · IDT · APIC · heap · framebuffer VT100 console (v1.5.1-FINAL) Complete
M7 StarForth VM integration + parity validation Complete
M7.1 Capsule birth protocol · Mama FORTH vocabulary · Tripod multi-VM fleet (Hermes/Artemis) · Word-level ACL (Phases 17) 🔄 In Progress
M8 REPL — keyboard input, interactive Forth Planned
M9 Block storage — AHCI driver Planned

POST at boot: parity hash verified across amd64/aarch64/riscv64 · Mama capsule dictionary: 453 words

What's live in M7.1

  • Tripod — a named multi-VM fleet (Hera the Mama VM, Artemis, two Hermes instances) births, runs, and re-births independently, verified booting live pre-REPL on all three architectures.
  • Hermes — a 17-block inter-VM messaging/channel layer between fleet members, with async delivery and channel negotiation.
  • Artemis — a Block Allocation Map (BAM) storage subsystem with Q48.16 block-heat tracking and cooldown/reclamation (ART-COOL/ART-REAP).
  • Word-level ACL — every dictionary entry carries a TTL/allow/mode/pin access-control record. Strict, TTL, and pinned modes; two console layers (emergency ok> and superuser zuse)ok>). Phases 17 complete (C infrastructure, FORTH policy layer, zuse bootstrap superuser, Isabelle proof stubs, kernel parity); Phase 8 (Ed25519 PKI / thumbdrive challenge-response) is the only item remaining. Measured overhead once active on every check: +0.0054%+0.0088%, CV = 0.000%, across a 3×3 Latin-square DoE campaign (architecture × seed × 30 replicates) — three orders of magnitude below the measurement floor.
  • VM Fleet Attractor physics — the L8 Jacquard mode selector now has a real per-VM heat channel into fleet-wide tuning, replacing hardcoded compudynamics constants with a dynamically-inferred rate.
  • Kconfig build configuration — every physics/heartbeat/pipelining/ kernel-only tuning knob (~40 total) is now a discoverable, optional Kconfig symbol shared with the hosted VM build. See Quick Start below.

Quick Start

# Build kernel (requires cross-compilation toolchain, or native gcc)
make -f Makefile.starkernel ARCH=amd64

# Run in QEMU with OVMF
make -f Makefile.starkernel qemu

# Other architectures
make -f Makefile.starkernel ARCH=aarch64 qemu
make -f Makefile.starkernel ARCH=riscv64 qemu

Artifacts: build/amd64/kernel/starkernel_loader.efi · build/amd64/kernel/starkernel_kernel.elf

For the hosted VM by itself (Linux, no cross-compiler needed, no bare-metal tooling): see the separate StarForth repository — LithosAnanke used to be a branch inside that repo, now it's its own project with its own master.

Build configuration (optional)

Every kernel-only knob (STARFORTH_ENABLE_VM, PARITY_MODE, the shared physics/heartbeat family, etc.) is an optional Kconfig symbol — a plain make -f Makefile.starkernel uses the same defaults it always has unless you opt in:

make -f Makefile.starkernel ARCH=amd64 menuconfig
make -f Makefile.starkernel ARCH=amd64 kernel_amd64_defconfig

Documentation

System Architecture Full kernel + VM design
HAL Reference Hardware abstraction layer interfaces
Capsule System — M7.1 Capsule birth protocol design
VM Fleet Attractor design log Tripod/Hermes/Artemis physics + build-system history
Getting Started / Kconfig reference Full symbol reference for both build targets
Changelog Milestone-level history
Roadmap Milestone plan through self-hosting

License

Starship License 1.0 (SL-1.0) — free for personal, research, and educational use. Commercial use requires a separate agreement. Attribution to R.A. James (Captain Bob) must be preserved in all distributions.

Patent pending. USPTO provisional filed December 2025 — physics-grounded self-adaptive runtime system. This license does not grant patent rights. Licensing inquiries: rajames440@gmail.com


Robert A. James (Captain Bob) · Systems Engineer · Hacking since 1973

S
Description
No description provided
Readme
1.3 GiB
Languages
C 70.4%
Isabelle 11.8%
TeX 5.2%
Shell 3.8%
R 2.8%
Other 6%